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PIC17CXX Datasheet, PDF (3/16 Pages) Microchip Technology – EPROM Memory Programming Specification
EPROM Memory Programming Specification
2.1.1 LOADING NEW ADDRESS
The program allows new address to be loaded right out
of reset. A 16-bit address is presented on ports RB
(high byte) and RC (low byte) and the RA1 is pulsed
(0 → 1, then 1 → 0). The address is latched on the ris-
ing edge of RA1. See timing diagrams for details. After
loading an address, the program automatically goes
into a “verify cycle”. To load a new address at any time,
the PIC17C4X must be reset and the programming
mode re-entered.
2.1.2 VERIFY (OR READ) MODE
“Verify mode” can be entered from “Load address”
mode, “program mode” or “verify mode”. In verify mode
pulsing RA1 will turn on PORTS RB and RC output
drivers and output the 16-bit value from the current
location. Pulsing RA1 again will increment location
count and be ready for the next verify cycle. Pulsing
RA0 will begin a program cycle.
2.1.3 PROGRAM CYCLE
“Program cycle” is entered from “verify cycle” or pro-
gram cycle” itself. After a verify, pulsing RA0 will begin
a program cycle. 16-bit data must be presented on
PORTS RB (high byte) and RC (low byte) before RA0
is raised.
The data is sampled 3 TCY cycles after the rising edge
of RA0. Programming continues for the duration of RA0
pulse.
At the end of programming the user can choose one of
three different routes. If RA1 is kept low and RA0 is
pulsed again, the same location will be programmed
again. This is useful for applying over programming
pulses. If RA1 is raised before RA0 falling edge, then a
verify cycle is started without address increment. Rais-
ing RA1 after RA0 goes low will increment address and
begin verify cycle on the next address.
FIGURE 2-2: PIC17C4X PROGRAM MEMORY MAP
0000
07FF
On chip
Program
EPROM
FE00 Configuration
FE0F
Word
FFFF
*This location does not exist for PIC17C42
FOSC0
FOSC1
WDTPS0
WDTPS1
PM0
Reserved
PM1
Reserved
Reserved
Reserved
PM2*
FE00
FE01
FE02
FE03
FE04
FE05
FE06
FE07
FE08
FE09
FE0F
© 1996 Microchip Technology Inc.
DS30139I-page 3