PIC17CXX Datasheet, PDF (2/16 Pages) Microchip Technology – EPROM Memory Programming Specification

PIC17CXX
The actual programming must be done with VDD in the
VDDP range (4.75 - 5.25V).
VDDP=VDD range required during programming.
VDD min.=minimum operating VDD spec for the part.
VDD max.=maximum operating VCC spec for the part.
Programmers must verify the PIC17CXX at its speci-
fied VDDmax and VDDmin levels. Since Microchip may
introduce future versions of the PIC17CXX with a
broader VDD range, it is best that these levels are user
selectable (defaults are ok).
Note:
Any programmer not meeting these
requirements may only be classified as
"prototype" or "development" programmer
but not a "production" quality programmer.
2.0 PROGRAM MODE ENTRY
To execute the programming routine, the user must
hold TEST pin high, RA2, RA3 must be low and RA4
must be high (after power-up) while keeping MCLR low
and then raise MCLR pin from VIL to VDD or VPP. This
will force FFE0h in the program counter and execution
will begin at that location (the beginning of the boot
code) following reset. Execution is forced to Internal
mode by overriding the fuse configuration. The code
protect bit is not overwritten. The program immediately
polls PORT RB<7:0> to determine a branch address.
Presenting E1h on PORT RB will cause the program to
jump to and execute the “program/verify” routine.
Note:
The OSC must not have 72 osc clocks
while the device MCLR is between VIL and
VIHH.
All unused pins during programming are in high imped-
ance state.
PORTB (RB) has internal weak pull-ups which are
active during the programming mode. When TEST pin
is high, Power-up timer (PWRT) and Oscillator Start-up
Timers (OST) are disabled.
2.1 Program/Verify Mode
The program/verify mode is intended for full-feature
programmers. This mode offers the following capabili-
ties:
a) Load any arbitrary 16-bit address to start pro-
gram and/or verify at that location.
b) Increment address to program/verify the next
location.
c) Allows arbitrary length programming pulse width.
d) Following a “verify” allows option to program the
same location or increment and verify the next
location.
e) Following a “program” allows options to program
the same location again, verify the same loca-
tion or to increment and verify the next location.
FIGURE 2-1: PROGRAMMING/VERIFY STATE DIAGRAM
Pulse
RA1
Increment
Address
Reset
Jump to
Program
Routine
Load
Address
Pulse
RA1
Verify
Pulse
RA1
RA0↑
Pulse RA1
(Raise RA1
after RA0↓)
Raise RA1
before RA0↓
Program
Pulse RA0
(RA0 pulse
width is
programming time)
DS30139I-page 2
© 1996 Microchip Technology Inc.