93C76 Datasheet, PDF (3/12 Pages) Microchip Technology – 8K/16K 5.0V Microwire Serial EEPROM

93C76/86
TABLE 1-3: AC CHARACTERISTICS
Applicable over recommended operating ranges shown below unless otherwise noted:
VCC = +4.5V to +5.5V
Commercial (C): Tamb = 0°C to -40°C
Industrial (I):
Tamb = -40°C to +85°C
Automotive (E): Tamb = -40°C to +125°C
Parameter
Symbol
Min.
Max.
Units Conditions
Clock frequency
Clock high time
Clock low time
Chip select setup time
Chip select hold time
Chip select low time
Data input setup time
Data input hold time
Data output delay time
Data output disable time
Status valid time
Program cycle time
FCLK
TCKH
TCKL
TCSS
TCSH
TCSL
TDIS
TDIH
TPD
TCZ
T_SV
TWC
—
2
MHz Vcc ≥ 4.5V
300
—
ns
200
—
ns
50
—
ns Relative to CLK
0
—
ns
250
—
ns Relative to CLK
100
—
ns Relative to CLK
100
—
ns Relative to CLK
—
400
ns CL = 100 pF
—
100
ns (Note 1)
—
500
ns CL = 100 pF
—
10
ms ERASE/WRITE mode (Note 2)
Endurance
TEC
—
15
ms ERAL mode
TWL
—
30
ms WRAL mode
—
10M
—
cycles 25°C, VCC = 5.0V, Block Mode
(Note 3)
Note 1: This parameter is periodically sampled and not 100% tested.
2: Typical program cycle is 4 ms per word.
3: This parameter is not tested but guaranteed by characterization. For endurance estimates in a specific appli-
cation, please consult the Total Endurance Model which can be obtained on our BBS or website.
TABLE 1-4: INSTRUCTION SET FOR 93C76: ORG=1 (X16 ORGANIZATION)
Instruction
READ
EWEN
ERASE
ERAL
WRITE
WRAL
EWDS
TABLE 1-5:
SB Opcode
Address
1
10 X A8 A7 A6 A5 A4 A3 A2 A1 A0
1
00 1 1 X X X X X X X X
1
11 X A8 A7 A6 A5 A4 A3 A2 A1 A0
1
00 1 0 X X X X X X X X
1
01 X A8 A7 A6 A5 A4 A3 A2 A1 A0
1
00 0 1 X X X X X X X X
1
00 0 0 X X X X X X X X
Data In Data Out
—
—
—
—
D15 - D0
D15 - D0
—
D15 - D0
High-Z
(RDY/BSY)
(RDY/BSY)
(RDY/BSY)
(RDY/BSY)
High-Z
INSTRUCTION SET FOR 93C76: ORG=0 (X8 ORGANIZATION)
Req. CLK Cycles
29
13
13
13
29
29
13
Instruction SB Opcode
Address
READ
EWEN
ERASE
ERAL
WRITE
WRAL
EWDS
1
10 X A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
1
00 1 1 X X X X X X X X X
1
11
X A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
1
00 1 0 X X X X X X X X X
1
01
X A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
1
00 0 1 X X X X X X X X X
1
00 0 0 X X X X X X X X X
Data In Data Out
—
—
—
—
D7 - D0
D7 - D0
—
D7 - D0
High-Z
(RDY/BSY)
(RDY/BSY)
(RDY/BSY)
(RDY/BSY)
High-Z
Req. CLK
Cycles
22
14
14
14
22
22
14
© 1996 Microchip Technology Inc.
Preliminary
DS21132C-page 3