24LC1025-I-SM Datasheet, PDF (3/28 Pages) Microchip Technology – 1024K I2C™ Serial EEPROM

24AA1025/24LC1025/24FC1025
TABLE 1-2: AC CHARACTERISTICS
AC CHARACTERISTICS
Industrial (I): VCC = +1.7V to 5.5V TA = -40°C to +85°C
Automotive (E): Vcc = +2.5V to 5.5V TA = -40°C to +125°C
Param.
No.
Sym.
Characteristic
Min.
Max. Units
Conditions
1
FCLK Clock frequency
—
100
kHz 1.7V  VCC  2.5V
—
100
2.5V  VCC  4.5V, E-temp
—
400
2.5V  VCC  5.5V
—
400
1.8V  VCC  2.5V (24FC1025 only)
—
1000
2.5V  VCC  5.5V (24FC1025 only)
2
THIGH Clock high time
4000
—
ns 1.7V  VCC  2.5V
4000
—
2.5V  VCC  4.5V, E-temp
600
—
2.5V  VCC  5.5V
600
—
1.8V  VCC  2.5V (24FC1025 only)
500
—
2.5V  VCC  5.5V (24FC1025 only)
3
TLOW Clock low time
4700
—
ns 1.7V  VCC  2.5V
4700
—
2.5V  VCC  4.5V, E-temp
1300
—
2.5V  VCC  5.5V
1300
—
1.8V  VCC  2.5V (24FC1025 only)
500
—
2.5V  VCC  5.5V (24FC1025 only)
4
TR
SDA and SCL rise time
(Note 1)
—
1000
ns 1.7V  VCC  2.5V
—
1000
2.5V  VCC  4.5V, E-temp
—
300
2.5V  VCC  5.5V
—
300
1.8V  VCC  2.5V (24FC1025 only)
—
300
2.5V  VCC  5.5V (24FC1025 only)
5
TF
SDA and SCL fall time
(Note 1)
—
300
ns All except 24FC1025
—
100
1.8V  VCC  5.5V (24FC1025 only)
6
THD:STA Start condition hold time
4000
—
ns 1.7V  VCC  2.5V
4000
—
2.5V  VCC  4.5V, E-temp
600
—
2.5V  VCC  5.5V
600
—
1.8V  VCC  2.5V (24FC1025 only)
250
—
2.5V  VCC  5.5V (24FC1025 only)
7
TSU:STA Start condition setup time
4700
—
ns 1.7V  VCC  2.5V
4700
—
2.5V  VCC  4.5V, E-temp
600
—
2.5V  VCC  5.5V
600
—
1.8V  VCC  2.5V (24FC1025 only)
250
—
2.5V  VCC  5.5V (24FC1025 only)
8
THD:DAT Data input hold time
0
—
ns (Note 2)
9
TSU:DAT Data input setup time
250
—
ns 1.7V  VCC  2.5V
250
—
2.5V  VCC  4.5V, E-temp
100
—
2.5V  VCC  5.5V
100
—
1.8V  VCC  2.5V (24FC1025 only)
100
—
2.5V  VCC  5.5V (24FC1025 only)
10
TSU:STO Stop condition setup time
4000
—
ns 1.7V  VCC  2.5V
4000
—
2.5V  VCC  4.5V, E-temp
600
—
2.5V  VCC  5.5V
600
—
1.8V  VCC  2.5V (24FC1025 only)
250
—
2.5V  VCC  5.5V (24FC1025 only)
Note 1: Not 100% tested. CB = total capacitance of one bus line in pF.
2: As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region (minimum
300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions.
3: The combined TSP and VHYS specifications are due to new Schmitt Trigger inputs which provide improved noise spike
suppression. This eliminates the need for a TI specification for standard operation.
4: This parameter is not tested but established by characterization. For endurance estimates in a specific application,
please consult the Total Endurance™ Model which can be obtained from Microchip’s web site at www.microchip.com.
 2005-2012 Microchip Technology Inc.
DS21941K-page 3