English
Language : 

USB3300 Datasheet, PDF (28/53 Pages) SMSC Corporation – HI SPEED USB HOST OR DEVICE PHY WITH ULPI LOW PIN INTERFACE
USB3300
6.1.7.2 Low Speed Keep-Alive
Low speed keep alive is supported by the USB3300. When in Low speed (10b), the USB3300 will send out two Low
speed bit times of SE0 when a SOF PID is received.
6.1.7.3 UTMI+ Level 3
Pre-amble is supported for UTMI+ Level 3 compatibility. When Xcvrselect is set to (11b) in host mode, (dpPulldown and
dmPulldown both asserted) the USB3300 will pre-pend a full speed pre-amble before the low speed packet. Full speed
rise and fall times are used in this mode. The pre-amble consists of the following: Full speed sync, the encoded pre-PID
(C3h) and then full speed idle (DP=1 and DM = 0). A low speed packet follows with a sync, data and a LS EOP.
6.1.7.4 Host Resume K
Resume K generation is supported by the USB3300. When the USB3300 exits the suspended low power state, the
USB3300, when operating as a host, will transmit a K on DP/DM. The transmitters will end the K with SE0 for two Low
Speed bit times. If the USB3300 was operating in high speed mode before the suspend, the host must change to high
speed mode before the SE0 ends. SE0 is two low speed bit times which is about 1.2 us.
The ULPI specification has an explicit discussion of the resume sequence and the order of operations required.
In device mode, the resume K will not append a SE0 but release the DP/ DM lines to allow the pull up to return the bus
to the correct idle state, depending upon the operational mode of the USB3300. Refer to Table 6-8, "DP/DM Termination
vs. Signaling Mode".
6.1.7.5 No SYNC and EOP Generation (Opmode 11) (optional)
UTMI+ defines an opmode 11 where no sync and EOP generation occurs in Hi-Speed operation. This is an option to
the ULPI specification and not implemented in the USB3300.
6.1.7.6 Typical USB Transmit with ULPI
Figure 6-6, "ULPI Transmit" shows a typical USB transmit sequence. A transmit sequence starts by the Link sending a
TXD CMD where DATA[7:6] = 01b, DATA[5:4] = 00b, and Data[3:0] = PID. The TX CMD with the PID is followed by
transmit data. Form the time the data is clocked into the transmitter it will appear at DP and DM 11 high speed bit times
later. This time is the HS_TX_START_DELAY.
FIGURE 6-6:
ULPI TRANSMIT
CLK
DATA[7:0] Idle
TXD CMD
(USB tx)
D0
D1
D2
D3
IDLE
DIR
NXT
STP
DP/DM
SE0
!SQUELCH
Turn
Around
RXD
Turn
CMD Around
SE0
During transmit the PHY will use NXT to control the rate of data flow into the PHY. If the USB3300 pipeline is full or bit-
stuffing causes the data pipeline to overfill NXT is de-asserted and the Link will hold the value on Data until NXT is
asserted. The USB Transmit ends when the Link asserts STP while NXT is asserted. (Note that the Link cannot assert
STP with NXT de-asserted since the USB3300 is expecting to fetch another byte from the Link in this state).
DS00001783B-page 28
 2014-2015 Microchip Technology Inc.