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DSPIC33FJ06GS101_12 Datasheet, PDF (247/386 Pages) Microchip Technology – 16-bit Digital Signal Controllers (up to 16 KB Flash and up to 2 KB SRAM) with High-Speed PWM, ADC, and Comparators | |||
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dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04
REGISTER 19-2: ADSTAT: ANALOG-TO-DIGITAL STATUS REGISTER
U-0
U-0
U-0
â
â
â
bit 15
U-0
U-0
U-0
U-0
U-0
â
â
â
â
â
bit 8
U-0
â
bit 7
R/C-0, HS
P6RDY
R/C-0, HS
P5RDY
R/C-0, HS R/C-0, HS
P4RDY
P3RDY
R/C-0, HS
P2RDY
R/C-0, HS
P1RDY
R/C-0, HS
P0RDY
bit 0
Legend:
R = Readable bit
-n = Value at POR
C = Clearable bit
W = Writable bit
â1â = Bit is set
HS = Hardware Settable bit
U = Unimplemented bit, read as â0â
â0â = Bit is cleared
x = Bit is unknown
bit 15-7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Unimplemented: Read as â0â
P6RDY: Conversion Data for Pair 6 Ready bit
Bit is set when data is ready in buffer, cleared when a â0â is written to this bit.
P5RDY: Conversion Data for Pair 5 Ready bit
Bit is set when data is ready in buffer, cleared when a â0â is written to this bit.
P4RDY: Conversion Data for Pair 4 Ready bit
Bit is set when data is ready in buffer, cleared when a â0â is written to this bit.
P3RDY: Conversion Data for Pair 3 Ready bit
Bit is set when data is ready in buffer, cleared when a â0â is written to this bit.
P2RDY: Conversion Data for Pair 2 Ready bit
Bit is set when data is ready in buffer, cleared when a â0â is written to this bit.
P1RDY: Conversion Data for Pair 1 Ready bit
Bit is set when data is ready in buffer, cleared when a â0â is written to this bit.
P0RDY: Conversion Data for Pair 0 Ready bit
Bit is set when data is ready in buffer, cleared when a â0â is written to this bit.
© 2008-2012 Microchip Technology Inc.
DS70318F-page 247
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