DSPIC33FJ06GS101_12 Datasheet, PDF (1/386 Pages) Microchip Technology – 16-bit Digital Signal Controllers (up to 16 KB Flash and up to 2 KB SRAM) with High-Speed PWM, ADC, and Comparators

dsPIC33FJ06GS101/X02 and
dsPIC33FJ16GSX02/X04
16-bit Digital Signal Controllers (up to 16 KB Flash and up to 2 KB
SRAM) with High-Speed PWM, ADC, and Comparators
Operating Conditions
• 3.0V to 3.6V, -40ºC to +150ºC, DC to 20 MIPS
• 3.0V to 3.6V, -40ºC to +125ºC, DC to 40 MIPS
• 3.0V to 3.6V, -40ºC to +85ºC, DC to 50 MIPS
Core: 16-bit dsPIC33F CPU
• Code-efficient (C and Assembly) architecture
• Two 40-bit wide accumulators
• Single-cycle (MAC/MPY) with dual data fetch
• Single-cycle mixed-sign MUL plus hardware divide
• 32-bit multiply support
Clock Management
• ±2.0% internal oscillator
• Programmable PLLs and oscillator clock sources
• Fail-Safe Clock Monitor (FSCM)
• Independent Watchdog Timer (WDT)
• Fast wake-up and start-up
Power Management
• Low-power management modes (Sleep, Idle, Doze)
• Integrated Power-on Reset and Brown-out Reset
High-Speed PWM
• Up to four PWM pairs with independent timing
• Dead time for rising and falling edges
• 1.04 ns PWM resolution
• PWM support for:
- DC/DC, AC/DC, Inverters, PFC, and Lighting
• Programmable Fault inputs
• Flexible trigger configurations for ADC conversions
Advanced Analog Features
• ADC module:
- 10-bit resolution with up to 2 Successive Approximation
Register (SAR) converters (4 Msps) and up to six
Sample and Hold (S&H) circuits
- Up to 12 input channels grouped into six conversion
pairs plus two voltage reference monitoring inputs
- Dedicated result buffer for each analog channel
• Flexible and independent ADC trigger sources
Advanced Analog Features (Continued)
• Up to four High-Speed Comparators with direct
connection to the PWM module:
- Programmable references with 1024 voltage points
Timers/Output Compare/Input Capture
• Three general purpose timers:
- Three 16-bit and one 32-bit timer/counter
• Two Output Compare (OC) modules
• Two Input Capture (IC) modules
• Peripheral Pin Select (PPS) to allow function remap
Communication Interfaces
• UART module (12.5 Mbps)
- With support for LIN 2.0 protocols and IrDA^®
• 4-wire SPI module
• I²C™ module (up to 1 Mbaud) with SMBus support
• PPS to allow function remap
Input/Output
• Sink/Source 18 mA on 8 pins, 10 mA on 10 pins, and 6
mA on 17 pins
• 5V-tolerant pins
• Selectable open drain and pull-ups
• External interrupts on up to 30 I/O pins
Qualification and Class B Support
• AEC-Q100 REVG (Grade 1 -40ºC to +125ºC)
• AEC-Q100 REVG (Grade 0 -40ºC to +150ºC)
• Class B Safety Library, IEC 60730, VDE certified
Debugger Development Support
• In-circuit and in-application programming
• Two breakpoints
• IEEE 1149.2-compatible (JTAG) boundary scan
• Trace and run-time watch
Packages
Type
SOIC
SPDIP
Pin Count
18
28
28
I/O Pins
13
21
21
Contact Lead/Pitch
1.27
1.27
.100''
Dimensions
10.30x7.50x2.65 17.9x7.50x2.05 1.365x.240x.120”
Note: All dimensions are in millimeters (mm) unless specified.
QFN-S
28
21
0.65
6x6x0.9
QFN
44
35
0.65
8x8x1
TQFP
44
35
0.80
10x10x1
VTLA
44
35
0.50
6x6x0.9
© 2008-2012 Microchip Technology Inc.
DS70318F-page 1