MIC24051 Datasheet, PDF (19/34 Pages) Micrel Semiconductor – 12V, 6A High-Efficiency Buck Regulator

MIC24051
FIGURE 4-3:
MIC24051 Current-Limit
Foldback Characteristic.
4.6 Power Good (PG)
The Power Good (PG) pin is an open drain output
which indicates logic high when the output is nominally
92% of its steady state voltage. A pull-up resistor of
more than 10 kΩ should be connected from PG to V_DD.
4.7 MOSFET Gate Drive
The Block Diagram shows a bootstrap circuit,
consisting of D1 (a Schottky diode is recommended)
and C_BST. This circuit supplies energy to the high-side
drive circuit. Capacitor C_BST is charged, while the
low-side MOSFET is on, and the voltage on the SW pin
is approximately 0V. When the high-side MOSFET
driver is turned on, energy from C_BST is used to turn the
MOSFET on. As the high-side MOSFET turns on, the
voltage on the SW pin increases to approximately V_IN.
Diode D1 is reverse biased and C_BST floats high while
continuing to keep the high-side MOSFET on. The bias
current of the high-side driver is less than 10 mA, so a
0.1 μF to 1 μF is sufficient to hold the gate voltage with
minimal droop for the power stroke (high-side
switching) cycle, i.e. ∆BST = 10 mA x 1.67 μs/0.1 μF =
167 mV. When the low-side MOSFET is turned back
on, C_BST is recharged through D1. A small resistor R_G,
which is in series with C_BST, can be used to slow down
the turn-on time of the high-side N-channel MOSFET.
The drive voltage is derived from the V_DD supply
voltage. The nominal low-side gate drive voltage is V_DD
and the nominal high-side gate drive voltage is
approximately V_DD – V_DIODE, where V_DIODE is the
voltage drop across D1. An approximate 30 ns delay
between the high-side and low-side driver transitions is
used to prevent current from simultaneously flowing
unimpeded through both MOSFETs.
 2016 Microchip Technology Inc.
DS20005658A-page 19