PIC16F631 Datasheet, PDF (185/294 Pages) Microchip Technology – 20-Pin Flash-Based, 8-Bit CMOS Microcontrollers with nanoWatt Technology

PIC16F631/677/685/687/689/690
13.8 Sleep Operation
In Master mode, all module clocks are halted and the
transmission/reception will remain in that state until the
device wakes from Sleep. After the device returns to
Normal mode, the module will continue to transmit/
receive data.
In Slave mode, the SPI Transmit/Receive Shift register
operates asynchronously to the device. This allows the
device to be placed in Sleep mode and data to be
shifted into the SPI Transmit/Receive Shift register.
When all 8 bits have been received, the SSP interrupt
flag bit will be set and if enabled, will wake the device
from Sleep.
13.9 Effects of a Reset
A Reset disables the SSP module and terminates the
current transfer.
13.10 Bus Mode Compatibility
Table 13-1 shows the compatibility between the
standard SPI modes and the states of the CKP and
CKE control bits.
TABLE 13-1: SPI BUS MODES
Standard SPI Mode
Terminology
Control Bits State
CKP
CKE
0, 0
0
1
0, 1
0
0
1, 0
1
1
1, 1
1
0
There is also a SMP bit which controls when the data is
sampled.
TABLE 13-2: REGISTERS ASSOCIATED WITH SPI OPERATION⁽¹⁾
Address Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR,
BOR
Value on
all other
Resets
0Bh/8Bh/ INTCON GIE PEIE T0IE INTE RABIE T0IF INTF RABIF 0000 000x 0000 000x
10Bh/18Bh
0Ch
PIR1
—
ADIF RCIF TXIF SSPIF CCP1IF TMR2IF TMR1IF -000 0000 -000 0000
13h
SSPBUF Synchronous Serial Port Receive Buffer/Transmit Register
xxxx xxxx uuuu uuuu
14h
SSPCON WCOL SSPOV SSPEN CKP SSPM3 SSPM2 SSPM1 SSPM0 0000 0000 0000 0000
86h/186h TRISB TRISB7 TRISB6 TRISB5 TRISB4 —
—
—
—
1111 ---- 1111 ----
87h/187h TRISC TRISC7 TRISC6 TRISC5 TRISC4 TRISC3 TRISC2 TRISC1 TRISC0 1111 1111 1111 1111
8Ch
PIE1
—
ADIE RCIE TXIE SSPIE CCP1IE TMR2IE TMR1IE -000 0000 -000 0000
94h
SSPSTAT SMP CKE
D/A
P
S
R/W
UA
BF 0000 0000 0000 0000
Legend: x = unknown, u = unchanged, – = unimplemented, read as ‘0’. Shaded cells are not used by the SSP in SPI mode.
Note 1: PIC16F687/PIC16F689/PIC16F690 only.
© 2007 Microchip Technology Inc.
DS41262D-page 183