PIC16F87X Datasheet, PDF (18/218 Pages) Microchip Technology – 28/40-pin 8-Bit CMOS FLASH Microcontrollers

PIC16F87X
TABLE 2-1: SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED)
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on:
POR,
BOR
Details
on
page:
Bank 1
80h⁽³⁾
INDF
Addressing this location uses contents of FSR to address data memory (not a physical register) 0000 0000
81h
OPTION_REG RBPU INTEDG T0CS
T0SE
PSA
PS2
PS1
PS0 1111 1111
82h⁽³⁾
PCL
Program Counter (PC) Least Significant Byte
0000 0000
83h⁽³⁾
STATUS
IRP
RP1
RP0
TO
PD
Z
DC
C
0001 1xxx
84h⁽³⁾
FSR
Indirect Data Memory Address Pointer
xxxx xxxx
85h
TRISA
—
—
PORTA Data Direction Register
--11 1111
86h
TRISB
PORTB Data Direction Register
1111 1111
87h
88h⁽⁴⁾
89h⁽⁴⁾
8Ah^(1,3)
8Bh⁽³⁾
8Ch
TRISC
TRISD
TRISE
PCLATH
INTCON
PIE1
PORTC Data Direction Register
PORTD Data Direction Register
IBF
OBF
IBOV
—
—
—
GIE
PSPIE⁽²⁾
PEIE
ADIE
T0IE
RCIE
PSPMODE
—
PORTE Data Direction Bits
Write Buffer for the upper 5 bits of the Program Counter
INTE
RBIE
T0IF
INTF
RBIF
TXIE
SSPIE
CCP1IE TMR2IE TMR1IE
1111 1111
1111 1111
0000 -111
---0 0000
0000 000x
0000 0000
8Dh
PIE2
—
(5)
—
EEIE
BCLIE
—
—
CCP2IE -r-0 0--0
8Eh
PCON
—
—
—
—
—
—
POR
BOR ---- --qq
8Fh
—
Unimplemented
—
90h
—
Unimplemented
—
91h
SSPCON2
GCEN ACKSTAT ACKDT ACKEN
RCEN
PEN
RSEN
SEN 0000 0000
92h
PR2
Timer2 Period Register
93h
SSPADD
Synchronous Serial Port (I²C mode) Address Register
1111 1111
0000 0000
94h
SSPSTAT
SMP
CKE
D/A
P
S
R/W
UA
BF 0000 0000
95h
—
Unimplemented
—
96h
—
Unimplemented
—
97h
—
Unimplemented
—
98h
TXSTA
CSRC
TX9
TXEN
SYNC
—
BRGH
TRMT
TX9D 0000 -010
99h
SPBRG
Baud Rate Generator Register
0000 0000
9Ah
—
Unimplemented
—
9Bh
—
Unimplemented
—
9Ch
—
Unimplemented
—
9Dh
—
Unimplemented
—
9Eh
ADRESL
A/D Result Register Low Byte
xxxx xxxx
9Fh
ADCON1
ADFM
—
—
—
PCFG3
PCFG2
PCFG1 PCFG0 0--- 0000
Legend: x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, read as '0', r = reserved.
Shaded locations are unimplemented, read as ‘0’.
Note 1: The upper byte of the program counter is not directly accessible. PCLATH is a holding register for the PC<12:8> whose
contents are transferred to the upper byte of the program counter.
2: Bits PSPIE and PSPIF are reserved on PIC16F873/876 devices; always maintain these bits clear.
3: These registers can be addressed from any bank.
4: PORTD, PORTE, TRISD, and TRISE are not physically implemented on PIC16F873/876 devices; read as ‘0’.
5: PIR2<6> and PIE2<6> are reserved on these devices; always maintain these bits clear.
27
19
26
18
27
29
31
33
35
37
26
20
21
23
25
—
—
68
55
73, 74
66
—
—
—
95
97
—
—
—
—
116
112
DS30292C-page 16
 2001 Microchip Technology Inc.