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PIC16F87X Datasheet, PDF (177/218 Pages) Microchip Technology – 28/40-pin 8-Bit CMOS FLASH Microcontrollers
PIC16F87X
FIGURE 15-21: A/D CONVERSION TIMING
BSF ADCON0, GO
Q4
A/D CLK 132
A/D DATA
ADRES
ADIF
GO
(TOSC/2)(1)
1 TCY
131
130
9
8
7 ... ...
2
1
0
OLD_DATA
NEW_DATA
DONE
SAMPLE
SAMPLING STOPPED
Note: If the A/D clock source is selected as RC, a time of TCY is added before the A/D clock starts. This allows the SLEEP
instruction to be executed.
TABLE 15-13: A/D CONVERSION REQUIREMENTS
Param
No.
Sym
Characteristic
130 TAD A/D clock period
Standard(F)
Extended(LF)
Standard(F)
Extended(LF)
131 TCNV Conversion time (not including S/H time)
(Note 1)
132 TACQ Acquisition time
Min
Typ†
1.6
—
3.0
—
2.0
4.0
3.0
6.0
—
(Note 2) 40
Max Units
Conditions
—
µs TOSC based, VREF ≥ 3.0V
—
µs TOSC based, VREF ≥ 2.0V
6.0
µs A/D RC mode
9.0
µs A/D RC mode
12
TAD
—
µs
10*
—
—
µs The minimum time is the
amplifier settling time. This may
be used if the "new" input volt-
age has not changed by more
than 1 LSb (i.e., 20.0 mV @
5.12V) from the last sampled
voltage (as stated on CHOLD).
134 TGO Q4 to A/D clock start
— TOSC/2 § —
— If the A/D clock source is
selected as RC, a time of TCY is
added before the A/D clock
starts. This allows the SLEEP
instruction to be executed.
* These parameters are characterized but not tested.
† Data in "Typ" column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are
not tested.
§ This specification ensured by design.
Note 1: ADRES register may be read on the following TCY cycle.
2: See Section 11.1 for minimum conditions.
 2001 Microchip Technology Inc.
DS30292C-page 175