PIC16F84A_13 Datasheet, PDF (17/90 Pages) Microchip Technology – 18-pin Enhanced FLASH/EEPROM 8-Bit Microcontroller

4.2 PORTB and TRISB Registers
PORTB is an 8-bit wide, bi-directional port. The corre-
sponding data direction register is TRISB. Setting a
TRISB bit (= 1) will make the corresponding PORTB pin
an input (i.e., put the corresponding output driver in a
Hi-Impedance mode). Clearing a TRISB bit (= 0) will
make the corresponding PORTB pin an output (i.e., put
the contents of the output latch on the selected pin).
EXAMPLE 4-2: INITIALIZING PORTB
BCF
CLRF
BSF
MOVLW
MOVWF
STATUS, RP0 ;
PORTB
; Initialize PORTB by
; clearing output
; data latches
STATUS, RP0 ; Select Bank 1
0xCF
; Value used to
; initialize data
; direction
TRISB
; Set RB<3:0> as inputs
; RB<5:4> as outputs
; RB<7:6> as inputs
Each of the PORTB pins has a weak internal pull-up. A
single control bit can turn on all the pull-ups. This is per-
formed by clearing bit RBPU (OPTION<7>). The weak
pull-up is automatically turned off when the port pin is
configured as an output. The pull-ups are disabled on a
Power-on Reset.
Four of PORTB’s pins, RB7:RB4, have an interrupt-on-
change feature. Only pins configured as inputs can
cause this interrupt to occur (i.e., any RB7:RB4 pin
configured as an output is excluded from the interrupt-
on-change comparison). The input pins (of RB7:RB4)
are compared with the old value latched on the last
read of PORTB. The “mismatch” outputs of RB7:RB4
are OR’ed together to generate the RB Port Change
Interrupt with flag bit RBIF (INTCON<0>).
This interrupt can wake the device from SLEEP. The
user, in the Interrupt Service Routine, can clear the
interrupt in the following manner:
a) Any read or write of PORTB. This will end the
mismatch condition.
b) Clear flag bit RBIF.
A mismatch condition will continue to set flag bit RBIF.
Reading PORTB will end the mismatch condition and
allow flag bit RBIF to be cleared.
The interrupt-on-change feature is recommended for
wake-up on key depression operation and operations
where PORTB is only used for the interrupt-on-change
feature. Polling of PORTB is not recommended while
using the interrupt-on-change feature.
PIC16F84A
FIGURE 4-3:
RBPU⁽¹⁾
Data Bus
WR Port
WR TRIS
BLOCK DIAGRAM OF
PINS RB7:RB4
Data Latch
DQ
CK
VDD
P
Weak
Pull-up
I/O pin⁽²⁾
TRIS Latch
DQ
CK
TTL
Input
Buffer
Set RBIF
RD TRIS
RD Port
Latch
QD
EN
From other
RB7:RB4 pins
QD
EN
Note 1:
2:
RD Port
TRISB = '1' enables weak pull-up
(if RBPU = '0' in the OPTION_REG register).
I/O pins have diode protection to VDD and VSS.
FIGURE 4-4:
BLOCK DIAGRAM OF
PINS RB3:RB0
RBPU⁽¹⁾
Data Bus
WR Port
Data Latch
DQ
CK
VDD
P
Weak
Pull-up
I/O pin⁽²⁾
WR TRIS
TRIS Latch
DQ
CK
TTL
Input
Buffer
RD TRIS
RD Port
Q
D
EN
RB0/INT
Schmitt Trigger
Buffer
RD Port
Note 1: TRISB = '1' enables weak pull-up
(if RBPU = '0' in the OPTION_REG register).
2: I/O pins have diode protection to VDD and VSS.
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DS35007C-page 17