DSPIC33FJ32GP202_11 Datasheet, PDF (145/284 Pages) Microchip Technology – High-Performance, 16-bit Digital Signal Controllers

dsPIC33FJ32GP202/204 and dsPIC33FJ16GP304
14.0 OUTPUT COMPARE
Note 1: This data sheet summarizes the features
of the dsPIC33FJ32GP202/204 and
dsPIC33FJ16GP304 family of devices. It
is not intended to be a comprehensive
reference source. To complement the
information in this data sheet, refer to
Section 13. “Output Compare”
(DS70209) of the “dsPIC33F/PIC24H
Family Reference Manual”, which is
available from the Microchip website
(www.microchip.com).
2: Some registers and associated bits
described in this section may not be
available on all devices. Refer to
Section 4.0 “Memory Organization” in
this data sheet for device-specific register
and bit information.
The Output Compare module can select either Timer2
or Timer3 for its time base. The module compares the
value of the timer with the value of one or two compare
registers depending on the operating mode selected.
The state of the output pin changes when the timer
value matches the compare register value. The Output
Compare module generates either a single output
pulse or a sequence of output pulses, by changing the
state of the output pin on the compare match events.
The Output Compare module can also generate
interrupts on compare match events.
The Output Compare module has multiple operating
modes:
• Active-Low One-Shot mode
• Active-High One-Shot mode
• Toggle mode
• Delayed One-Shot mode
• Continuous Pulse mode
• PWM mode without fault protection
• PWM mode with fault protection
FIGURE 14-1:
OUTPUT COMPARE MODULE BLOCK DIAGRAM
Set Flag bit
OCxIF
OCxRS
OCxR
Comparator
0 1 OCTSEL 0
16
16
Output
Logic
SQ
R
3
OCM<2:0>
Mode Select
Output
Enable
Output
Enable
Logic
1
OCx
OCFA
TMR2 TMR3
TMR2 _TMR3
Rollover _Rollover
© 2011 Microchip Technology Inc.
DS70290G-page 145