DSPIC33FJ256GP710T Datasheet, PDF (139/322 Pages) Microchip Technology – dsPIC33FJXXXGPX06/X08/X10 Data Sheet

dsPIC33FJXXXGPX06/X08/X10
9.0 OSCILLATOR
CONFIGURATION
Note:
This data sheet summarizes the features
of the dsPIC33FJXXXGPX06/X08/X10
family of devices. However, it is not
intended to be a comprehensive reference
source. To complement the information in
this data sheet, refer to Section 7.
“Oscillator” (DS70186) in the “dsPIC33F
Family Reference Manual”, which is
available from the Microchip web site
(www.microchip.com).
The dsPIC33FJXXXGPX06/X08/X10 oscillator system
provides:
• Various external and internal oscillator options as
clock sources
• An on-chip PLL to scale the internal operating
frequency to the required system clock frequency
• The internal FRC oscillator can also be used with
the PLL, thereby allowing full-speed operation
without any external clock generation hardware
• Clock switching between various clock sources
• Programmable clock postscaler for system power
savings
• A Fail-Safe Clock Monitor (FSCM) that detects
clock failure and takes fail-safe measures
• A Clock Control register (OSCCON)
• Nonvolatile Configuration bits for main oscillator
selection.
A simplified diagram of the oscillator system is shown
in Figure 9-1.
FIGURE 9-1:
dsPIC33FJXXXGPX06/X08/X10 OSCILLATOR SYSTEM DIAGRAM
Primary Oscillator
OSC1
R⁽²⁾
S3
OSC2
S1
POSCMD<1:0>
dsPIC33F
XT, HS, EC
S2
DOZE<2:0>
XTPLL, HSPLL,
PLL⁽¹⁾
ECPLL, FRCPLL
S1/S3
FCY
FP
FRC
Oscillator
÷2
FRCDIVN _S7
FOSC
TUN<5:0>
FRCDIV<2:0>
÷ 16
SOSCO
SOSCI
LPRC
Oscillator
Secondary Oscillator
LPOSCEN
FRCDIV16 _S6
FRC _S0
LPRC
S5
SOSC
S4
Clock Fail Clock Switch Reset
S7
NOSC<2:0> FNOSC<2:0>
WDT, PWRT,
FSCM
Timer 1
Note 1: See Figure 9-2 for PLL details.
2: If the Oscillator is used with XT or HS modes, an extended parallel resistor with the value of 1 MΩ must be connected.
© 2009 Microchip Technology Inc.
DS70286C-page 137