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PIC24HJ64GP206A-I Datasheet, PDF (130/304 Pages) Microchip Technology – High-Performance,16-bit Microcontrollers | |||
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PIC24HJXXXGPX06A/X08A/X10A
REGISTER 9-1: OSCCON: OSCILLATOR CONTROL REGISTER(1)
U-0
â
bit 15
R-0
R-0
R-0
U-0
R/W-y
COSC<2:0>
â
R/W-y
NOSC<2:0>(2)
R/W-y
bit 8
R/W-0
U-0
CLKLOCK
â
bit 7
R-0
U-0
R/C-0
LOCK
â
CF
U-0
R/W-0
R/W-0
â
LPOSCEN OSWEN
bit 0
Legend:
R = Readable bit
-n = Value at POR
y = Value set from Configuration bits on POR
C = Clear only bit
W = Writable bit
U = Unimplemented bit, read as â0â
â1â = Bit is set
â0â = Bit is cleared
x = Bit is unknown
bit 15
bit 14-12
bit 11
bit 10-8
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
Unimplemented: Read as â0â
COSC<2:0>: Current Oscillator Selection bits (read-only)
000 = Fast RC oscillator (FRC)
001 = Fast RC oscillator (FRC) with PLL
010 = Primary oscillator (XT, HS, EC)
011 = Primary oscillator (XT, HS, EC) with PLL
100 = Secondary oscillator (SOSC)
101 = Low-Power RC oscillator (LPRC)
110 = Fast RC oscillator (FRC) with Divide-by-16
111 = Fast RC oscillator (FRC) with Divide-by-n
Unimplemented: Read as â0â
NOSC<2:0>: New Oscillator Selection bits(2)
000 = Fast RC oscillator (FRC)
001 = Fast RC oscillator (FRC) with PLL
010 = Primary oscillator (XT, HS, EC)
011 = Primary oscillator (XT, HS, EC) with PLL
100 = Secondary oscillator (SOSC)
101 = Low-Power RC oscillator (LPRC)
110 = Fast RC oscillator (FRC) with Divide-by-16
111 = Fast RC oscillator (FRC) with Divide-by-n
CLKLOCK: Clock Lock Enable bit
1 = If (FCKSM0 = 1), then clock and PLL configurations are locked
If (FCKSM0 = 0), then clock and PLL configurations may be modified
0 = Clock and PLL selections are not locked, configurations may be modified
Unimplemented: Read as â0â
LOCK: PLL Lock Status bit (read-only)
1 = Indicates that PLL is in lock, or PLL start-up timer is satisfied
0 = Indicates that PLL is out of lock, start-up timer is in progress or PLL is disabled
Unimplemented: Read as â0â
CF: Clock Fail Detect bit (read/clear by application)
1 = FSCM has detected clock failure
0 = FSCM has not detected clock failure
Unimplemented: Read as â0â
Note 1: Writes to this register require an unlock sequence. Refer to Section 7. âOscillatorâ (DS70227) in the
âdsPIC33F/PIC24H Family Reference Manualâ (available from the Microchip website) for details.
2: Direct clock switches between any primary oscillator mode with PLL and FRCPLL mode are not permitted.
This applies to clock switches in either direction. In these instances, the application must switch to FRC mode
as a transition clock source between the two PLL modes.
DS70592B-page 130
Preliminary
ï£ 2009 Microchip Technology Inc.
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