MRF24J40MD Datasheet, PDF (13/34 Pages) Microchip Technology – 2.4 GHz IEEE Std. 802.15.4™ RF Transceiver Module with PA/LNA

MRF24J40MD/ME
2.3 Module Schematic
A schematic diagram of the module is illustrated in
Figure 2-5 and the Bill of Materials (BOM) is shown in
Table 2-2.
The MRF24J40MD/ME module is based on the
Microchip Technology MRF24J40 IEEE 802.15.4™ 2.4
GHz RF Transceiver IC (U2). The Serial I/O (SCK, SDI,
SDO and CS), RESET, WAKE and INT pins are
brought out to the module pins. The SDO signal is
tri-state buffered by U7 to solve a silicon errata, where
the SDO signal does not release to a high-impedance
state, after the CS pin returns to its inactive state.
Crystal, X1, is a 20 MHz crystal with a frequency
tolerance of ±10 ppm @ 25°C to meet the IEEE Std.
802.15.4 symbol rate tolerance of ±40 ppm.
A balun is formed by components: L2, L4, L5, C19,
C20, C22 and C43. L2 is also a pull-up for the RFP and
RFN pins on the MRF24J40. C19 also act as a DC
block capacitor. RF switches, U3 and U4, switch
between the power amplifier, U6, when transmitting
and low noise amplifier, U1, when receiving. A
band-pass filter U5 is placed after the PA U6 to reduce
harmonics. The remaining passive components
provide bias and decoupling.
FIGURE 2-4:
MRF24J40MD/ME APPLICATION SCHEMATIC
 2014 Microchip Technology Inc.
Advance Information
DS70005173A-page 13