PIC16C781 Datasheet, PDF (112/186 Pages) Microchip Technology – 8-Bit CMOS Microcontrollers with A/D, D/A, OPAMP, Comparators and PSMC

PIC16C781/782
13.3.2 EXAMPLE BUCK LC SWITCHING
POWER SUPPLY
In this example, the PSMC controls the buck configura-
tion switching power supply in Figure 13-6.
The PSMC is configured as a typical PWM, current
mode, switching power supply controller. The inner cur-
rent feedback loops consist of:
• PSMC
• 2 MOSFET drivers
• Power MOSFETs Q1 and Q2
• Inductors L1 and L2
• Current transformer
• Comparator C1/C2
The outer voltage feedback loop consists of:
• Diodes D1, D2, D3, and D4
• CMAIN
• OPAMP feedback filter
• DAC reference
The circuit uses two feedback loops, an inner current
control loop, and an outer voltage loop. The inner loop
is further divided into two channels, Q1/L1, and Q2/L2.
The PSMC operates a PWM output, alternately driving
Q1 for a cycle, then driving Q2 the next. During the
active phase of either output pulse, the inner loop
builds up a current flow in the output’s inductor, propor-
tional to the error voltage received from the OPAMP.
The current flow in the inductor begins the charging of
CMAIN. When the voltage (proportional to the current
flow in the inductor) exceeds the error voltage:
• The comparator resets the PSMC output
• The MOSFET is turned off
• The flyback diode forward biases
• The inductor discharges into CMAIN for the
remainder of the period.
The outer voltage loop monitors the output voltage
across CMAIN via R1/R2. The reference voltage from
the DAC is subtracted from the feedback voltage to
generate the raw error voltage. The raw error voltage is
then filtered by the OPAMP and routed to Comparator
C1 in the inner current loop.
In using two alternating outputs, the outputs are limited
to less than 50% duty cycle. As a result, the circuit
avoids the problems associated with instability at duty
cycles of >50%.
For more information concerning the design of switch-
ing power supplies, refer to:
Switching Power Supply Design, by Abraham I. Press-
man, published by McGraw Hill (ISBN 0-07-052236-7).
Note:
Following RESET, both the PSMC1A and
PSMC1B outputs are held tri-state until the
PSMC is configured. Driver circuitry for all
power MOSFET transistors must have a
resistor bias to turn off the transistor in the
event of tri-state conditions on either out-
put to prevent undo stress on the MOS-
FET's and their associated circuitry.
DS41171A-page 110
Preliminary
 2001 Microchip Technology Inc.