PIC10LF320 Datasheet, PDF (104/193 Pages) Microchip Technology – 6/8-Pin Flash-Based, 8-Bit Microcontrollers

PIC10(L)F320/322
19.0 CONFIGURABLE LOGIC CELL
(CLC)
The Configurable Logic Cell (CLCx) provides program-
mable logic that operates outside the speed limitations
of software execution. The logic cell selects any combi-
nation of the eight input signals and through the use of
configurable gates reduces the selected inputs to four
logic lines that drive one of eight selectable single-out-
put logic functions.
Input sources are a combination of the following:
• Two I/O pins
• Internal clocks
• Peripherals
• Register bits
The output can be directed internally to peripherals and
to an output pin.
Refer to Figure 19-1 for a simplified diagram showing
signal flow through the CLCx.
Possible configurations include:
• Combinatorial Logic
- AND
- NAND
- AND-OR
- AND-OR-INVERT
- OR-XOR
- OR-XNOR
• Latches
- S-R
- Clocked D with Set and Reset
- Transparent D with Set and Reset
- Clocked J-K with Reset
FIGURE 19-1:
CLCx SIMPLIFIED BLOCK DIAGRAM
CLCxIN[0]
CLCxIN[1]
CLCxIN[2]
CLCxIN[3]
CLCxIN[4]
CLCxIN[5]
CLCxIN[6]
CLCxIN[7]
See Figure 19-3
lcxg1
LCxEN
lcxg2 _{Logic lcxq}
lcxg3 _Function
lcxg4
LCxMODE<2:0>
LCxPOL
See Figure 19-2
DQ
Q1 LE
LCxOUT
lcx_out
LCxOE
TRIS Control
CLCx
Interrupt
det
LCxINTP
LCxINTN
Interrupt
det
sets
CLCxIF
flag
DS40001585D-page 104
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