PIC16C717_13 Datasheet, PDF(103/224 Page) Microchip Technology – 18/20-Pin, 8-Bit CMOS Microcontrollers with 10/12-Bit A/D

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PIC16C717_13 Datasheet, PDF (103/224 Pages) Microchip Technology – 18/20-Pin, 8-Bit CMOS Microcontrollers with 10/12-Bit A/D

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PIC16C717/770/771

10.1 Bandgap Voltage Reference

The bandgap module generates a stable voltage refer-

ence of over a range of temperatures and device sup-

ply voltages. This module is enabled anytime any of the

following are enabled:

â¢ Brown-out Reset

â¢ Low-voltage Detect

â¢ Either of the internal analog references (VRH,

VRL)

Whenever the above are all disabled, the bandgap

module is disabled and draws no current.

10.2 Internal VREF for A/D Converter

The bandgap output voltage is used to generate two

stable references for the A/D converter module. These

references are enabled in software to provide the user

with the means to turn them on and off in order to min-

imize current consumption. Each reference can be indi-

vidually enabled.

The VRH reference is enabled with control bit VRHEN

(REFCON<7>). When this bit is set, the gain amplifier

is enabled. After a specified start-up time a stable ref-

erence of 4.096V nominal is generated and can be

used by the A/D converter as a reference input.

The VRL reference is enabled by setting control bit

VRLEN (REFCON<6>). When this bit is set, the gain

amplifier is enabled. After a specified start-up time a

stable reference of 2.048V nominal is generated and

can be used by the A/D converter as a reference input.

Each voltage reference is available for external use via

VRL and VRH pins.

Each reference, if enabled, can be output on an exter-

nal pin by setting the VRHOEN (high reference output

enable) or VRLOEN (low reference output enable) con-

trol bit. If the reference is not enabled, the VRHOEN

and VRLOEN bits will have no effect on the corre-

sponding pin. The device specific pin can then be used

as general purpose I/O.

Note:

If VRH or VRL is enabled and the other ref-

erence (VRL or VRH), the BOR, and the

LVD modules are not enabled, the band-

gap will require a start-up time before the

bandgap reference is stable. Before using

the internal VRH or VRL reference, ensure

that the bandgap reference voltage is sta-

ble by monitoring the BGST bit in the LVD-

CON register. The voltage references will

not be reliable until the bandgap is stable

as shown by BGST being set.

FIGURE 10-1: BLOCK DIAGRAM OF LVD AND VOLTAGE REFERENCE CIRCUIT

LVDCON

REFCON

VDD

LVDEN

VRHEN + VRLEN

RA1/AN1/LVDIN

generates

LVDIF

BODEN

VRH

BGAP

VRL

LVDEN

ï£ 1999-2013 Microchip Technology Inc.

DS41120C-page 103

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