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TC1054_12 Datasheet, PDF (10/20 Pages) Microchip Technology – 50 mA, 100 mA and 150 mA CMOS LDOs with Shutdown and ERROR Output | |||
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TC1054/TC1055/TC1186
5.0 THERMAL CONSIDERATIONS
5.1 Thermal Shutdown
Integrated thermal protection circuitry shuts the
regulator off when die temperature exceeds +160°C.
The regulator remains off until the die temperature
drops to approximately +150°C.
5.2 Power Dissipation
The amount of power the regulator dissipates is
primarily a function of input voltage, output voltage and
output current. The following equation is used to
calculate worst-case actual power dissipation:
EQUATION 5-1:
PD ï» ï¨VINMAX â VOUTMINï©ILOADMAX
Where:
PD = Worst-case actual power dissipation
VINmax = Maximum voltage on VIN
VOUTmin = Minimum regulator output voltage
ILOADmax = Maximum output (load) current
The maximum allowable power dissipation
(Equation 5-2) is a function of the maximum ambient
temperature (TAMAX), the maximum allowable die
temperature (TJMAX) and the thermal resistance from
junction-to-air (ï±JA). The 5-Pin SOT-23 package has a
ï±JA of approximately 220°C/Watt.
EQUATION 5-2:
PDMAX = -ï¨--T----J--M----A----X-ï±---â-J--A-T----A---M----A----X---ï©
Where all terms are previously defined.
Equation 5-1 can be used in conjunction with
Equation 5-2 to ensure regulator thermal operation is
within limits.
For example:
Given:
VINMAX
VOUTMIN
ILOADMAX
TJMAX
TAMAX
Find:
= 3.0V +5%
= 2.7V â 2.5%
= 40 mA
= +125°C
= +55°C
1. Actual power dissipation
2. Maximum allowable dissipation
Actual power dissipation:
PD ï» ï¨VINMAX â VOUTMINï©ILOADMAX
= ïï¨3.0 ï´ 1.05ï© â ï¨2.7 ï´ 0.975ï©ï40 ï´ 10-3
= 20.7mW
Maximum allowable power dissipation:
PDMAX = -ï¨--T----J--M----A---X--ï±---â-J--A-T----A---M----A----X---ï©
= ï¨---1---2---52---2--â-0---5---5----ï©
= 318mW
In this example, the TC1054 dissipates a maximum of
20.7 mW; below the allowable limit of 318 mW. In a
similar manner, Equation 5-1 and Equation 5-2 can be
used to calculate maximum current and/or input
voltage limits.
5.3 Layout Considerations
The primary path of heat conduction out of the package
is via the package leads. Layouts having a ground
plane, wide traces at the pads and wide power supply
bus lines, combine to lower θJA and increase the max-
imum allowable power dissipation limit.
DS21350E-page 10
ï£ 2002-2012 Microchip Technology Inc.
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