KSZ9031MNX Datasheet, PDF(1/73 Page) Micrel Semiconductor – The KSZ9031MNX is a completely integrated triple-speed (10Base-T/100Base-TX/1000Base-T) Ethernet physicallayer transceiver for transmission and reception of data on standard CAT-5 unshielded twisted pair (UTP) cable.

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KSZ9031MNX Datasheet, PDF (1/73 Pages) Micrel Semiconductor – The KSZ9031MNX is a completely integrated triple-speed (10Base-T/100Base-TX/1000Base-T) Ethernet physicallayer transceiver for transmission and reception of data on standard CAT-5 unshielded twisted pair (UTP) cable.

KSZ9031MNX

Gigabit Ethernet Transceiver with GMII/MII

Support

Target Applications

â¢ Laser/Network Printer

â¢ Network Attached Storage (NAS)

â¢ Network Server

â¢ Broadband Gateway

â¢ Gigabit SOHO/SMB Router

â¢ IPTV

â¢ IP Set-Top Box

â¢ Game Console

â¢ IP Camera

â¢ Triple-Play (Data, Voice, Video) Media Center

â¢ Media Converter

Features

â¢ Single-Chip 10/100/1000 Mbps Ethernet Trans-

ceiver Suitable for IEEE 802.3 Applications

â¢ GMII/MII Standard Interface with 3.3V/2.5V/1.8V

Tolerant I/Os

â¢ Auto-Negotiation to Automatically Select the

Highest Link-Up Speed (10/100/1000 Mbps) and

Duplex (Half/Full)

â¢ On-Chip Termination Resistors for the Differential

Pairs

â¢ On-Chip LDO Controller to Support Single 3.3V

Supply Operation

â¢ Jumbo Frame Support Up to 16 KB

â¢ 125 MHz Reference Clock Output

â¢ Energy-Detect Power-Down Mode for Reduced

Power Consumption When the Cable is Not

Attached

â¢ Wake-On-LAN (WOL) Support with Robust Cus-

tom-Packet Detection

â¢ Programmable LED Outputs for Link, Activity, and

Speed

â¢ Baseline Wander Correction

â¢ LinkMD TDR-based Cable Diagnostic to Identify

Faulty Copper Cabling

â¢ Parametric NAND Tree Support to Detect Faults

Between Chip I/Os and Board

â¢ Loopback Modes for Diagnostics

â¢ Automatic MDI/MDI-X Crossover to Detect and

Correct Pair Swap at All Speeds of Operation

â¢ Automatic Detection and Correction of Pair

Swaps, Pair Skew, and Pair Polarity

â¢ MDC/MDIO Management Interface for PHY Reg-

ister Configuration

â¢ Interrupt Pin Option

â¢ Power-Down and Power-Saving Modes

â¢ Operating Voltages

- Core (DVDDL, AVDDL, AVDDL_PLL): 1.2V

(External FET or Regulator)

- VDD I/O (DVDDH): 3.3V, 2.5V, or 1.8V

- Transceiver (AVDDH): 3.3V or 2.5V

(Commercial Temp.)

â¢ 64-pin QFN (8 mm Ã 8 mm) Package

ï£ 2016 Microchip Technology Inc.

DS00002096C-page 1

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