MIC5021 Datasheet, PDF (9/9 Pages) Micrel Semiconductor – High-Speed High-Side MOSFET Driver

MIC5021
Micrel
Remote Overcurrent Limiting Reset
In circuit breaker applications where the MIC5021 maintains
an off condition after an overcurrent condition is sensed, the
C_T pin can be used to reset the MIC5021.
+12V to +20V
10µF
TTL Input
MIC5021
1
V_DD
8
V_BOOST
2
Input
7
Gate
10k to
100k
74HC04
(example)
3
2N3904 ^CT
Q1
4
Gnd
6
Sense
5
Sense
N-Channel
Power
MOSFET
0.01
µF
R_SENSE
10µF
TTL Input
+12V to +36V
MIC5021AJB
1
V_DD
8
V_BOOST
2
Input
7
Gate
3
C_T
4
Gnd
6
Sense
5
Sense
add resistor for
–40°C to –55°C
operation
2.7
nF 2.2M
R_SENSE
Retry (H)
Maintained (L)
Figure 12a. Gate-to-Source Pull Down
The gate-to-source configuration (refer to Figure 12a) is
appropriate for resistive and inductive loads. This also
causes the smallest decrease in gate output voltage.
Figure 11. Remote Control Circuit
+12V to +36V
Switching Q1 on pulls C_T low which keeps the MIC5021 GATE
output off when an overcurrent is sensed. Switching Q1 off
MIC5021AJB
causes C_T to appear open. The MIC5021 retries in about
20µs and continues to retry until the overcurrent condition is
10µF
TTL Input
1
V_DD
2
Input
8
V_BOOST
7
Gate
removed.
For demonstration purposes, a 680Ω load resistor and 3Ω
sense resistor will produce an overcurrent condition when the
load’s supply (V+) is approximately 12V or greater.
3
6
C_T Sense
2.7
4
5
nF
Gnd Sense
R_SENSE
5
Low-Temperature Operation
As the temperature of the MIC5021AJB (extended tempera-
ture range version—no longer available) approaches –55°C,
add resistor for
–40°C to –55°C
operation
2.2M
the driver’s off-state, gate-output offset from ground in-
creases. If the operating environment of the MIC5021AJB
includes low temperatures (–40°C to –55°C), add an external
2.2MΩ resistor as shown in Figures 12a or 12b. This assures
that the driver’s gate-to-source voltage is far below the
external MOSFET’s gate threshold voltage, forcing the
MOSFET fully off.
Figure 12b. Gate-to-Ground Pull Down
The gate-to-ground configuration (refer to Figure 12b) is
appropriate for resistive, inductive, or capacitive loads. This
configuration will decrease the gate output voltage slightly
more than the circuit shown in Figure 12a.
October 1998
5-177