KSZ8864RMN Datasheet, PDF (79/112 Pages) Micrel Semiconductor – Integrated 4-Port 10/100 Managed Switch with Two MACs MII or RMII Interfaces

Micrel, Inc.
KSZ8864RMN
Address Name
Description
Register 182 (0xB6): Reserved
Register 198 (0xC6): Port 1 Rate Limit Control
Register 214 (0xD6): Port 2 Rate Limit Control
Register 230 (0xE6): Port 3 Rate Limit Control
Register 246 (0xF6): Port 4 Rate Limit Control
7-5
Reserved
4
Ingress Rate Limit Flow
Control Enable
3-2
Limit Mode
1 = Flow Control is asserted if the port’s receive
rate is exceeded
0 = Flow Control is not asserted if the port’s receive
rate is exceeded
Ingress Limit Mode
These bits determine what kinds of frames are
limited and counted against ingress rate limiting.
= 00, limit and count all frames
= 01, limit and count Broadcast, Multicast, and
flooded unicast frames
= 10, limit and count Broadcast and Multicast
frames only
= 11, limit and count Broadcast frames only
1
Count IFG
Count IFG bytes
= 1, each frame’s minimum inter frame gap
(IFG) bytes (12 per frame) are included in Ingress
and Egress rate limiting calculations.
= 0, IFG bytes are not counted.
0
Count Pre
Count Preamble bytes
= 1, each frame’s preamble bytes (8 per
frame) are included in Ingress and Egress rate
limiting calculations.
= 0, preamble bytes are not counted.
Register 183 (0xB7): Reserved
Register 199 (0xC7): Port 1 Priority 0 Ingress Limit Control 1
Register 215 (0xD7): Port 2 Priority 0 Ingress Limit Control 1
Register 231 (0xE7): Port 3 Priority 0 Ingress Limit Control 1
Register 247 (0xF7): Port 4 Priority 0 Ingress Limit Control 1
7
Reserved
6-0
Port Based Priority 0 Ingress
Limit
Ingress data rate limit for priority 0 frames
Ingress traffic from this port is shaped according to
the Data Rate Selected Table. See the table follow
the end of Egress limit control registers
Mode
RO
R/W
R/W
R/W
R/W
RO
R/W
Default
000
0
00
0
0
0
0000000
September 2011
79
M9999-092011-1.4