KSZ8842-16 Datasheet, PDF (77/126 Pages) Micrel Semiconductor – 2-Port Ethernet Switch with Non-PCI Interface

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KSZ8842-16/32 MQL/MVL
Bank 44 Digital Testing Control Register (0x04): DTCR
This register contains the user defined register for the switch function.
Bit
Default
R/W Description
15-8
0x00
RO Reserved
7-0
0x3F
RW Reserved
Bank 44 Analog Testing Control Register 0 (0x06): ATCR0
This register contains the user defined register for the switch function.
Bit
Default
R/W Description
15-8
0x00
RO Reserved
7-0
0x00
RW Reserved
Bank 44 Analog Testing Control Register 1 (0x08): ATCR1
This register contains the user defined register for the switch function.
Bit
Default
R/W Description
15-0
0x0000
RW Reserved
Bank 44 Analog Testing Control Register 2 (0x0A): ATCR2
This register contains the user defined register for the switch function.
Bit
Default
R/W Description
15-0
0x0000
RW Reserved
Bank 45 PHY 1 MII-Register Basic Control Register (0x00): P1MBCR
This register contains Media Independent Interface (MII) register for switch port 1 as defined in the IEEE 802.3
specification.
Bit
Default
15
0
14
0
13
0
12
1
11
0
10
0
9
0
R/W Description
RO Soft reset
Not supported.
RW Far-End Loopback
1 = perform loopback as follows:
Start: RXP2/RXM2 (port 2)
Loop back: PMD/PMA of port 1’s PHY
End: TXP2/TXM2 (port 2)
0 = normal operation.
RW Force 100
1 = force 100Mbps if AN is disabled (bit 12)
0 = force 10Mbps if AN is disabled (bit 12)
RW AN Enable
1 = auto-negotiation enabled.
0 = auto-negotiation disabled.
RW Power-Down
1 = power-down.
0 = normal operation.
RO Isolate
Not supported.
RW Restart AN
1 = restart auto-negotiation.
0 = normal operation.
Bit is same as:
Bank 49 0x02 bit 8
Bank 49 0x02 bit 6
Bank 49 0x02 bit 7
Bank 49 0x02 bit 11
Bank 49 0x02 bit 13
November 2005
77
Rev. 1.4