KSZ8893MQLI Datasheet, PDF (76/116 Pages) Micrel Semiconductor – Integrated 3-Port 10/100 Managed Switch with PHYs

Micrel, Inc.
KSZ8893MQL/MBL
Register 25 (0x19): Port 1 Control 9
Register 41 (0x29): Port 2 Control 9
Register 57 (0x39): Port 3 Control 9
Bit
Name
R/W Description
7-4
Egress Pri3
R/W Egress data rate limit for priority 3 frames
Rate
Egress traffic from this priority queue is shaped
according to the egress rate selected below:
0000 = Not limited (Default)
0001 = 64 Kbps
0010 = 128 Kbps
0011 = 256 Kbps
0100 = 512 Kbps
0101 = 1 Mbps
0110 = 2 Mbps
0111 = 4 Mbps
1000 = 8 Mbps
1001 = 16 Mbps
1010 = 32 Mbps
1011 = 48 Mbps
1100 = 64 Mbps
1101 = 72 Mbps
1110 = 80 Mbps
1111 = 88 Mbps
Default
0x0
Note: For 10BT, rate settings above 10Mbps are
set to the default value 0000 (Not limited).
When TX multiple queue select enable is off
(only 1 queue per port), rate limiting applies only
to priority 0 queue.
3-0
Egress Pri2
R/W Egress data rate limit for priority 2 frames
0x0
Rate
Egress traffic from this priority queue is shaped
according to the egress rate selected below:
0000 = Not limited (Default)
0001 = 64 Kbps
0010 = 128 Kbps
0011 = 256 Kbps
0100 = 512 Kbps
0101 = 1 Mbps
0110 = 2 Mbps
0111 = 4 Mbps
1000 = 8 Mbps
1001 = 16 Mbps
1010 = 32 Mbps
1011 = 48 Mbps
1100 = 64 Mbps
1101 = 72 Mbps
1110 = 80 Mbps
1111 = 88 Mbps
Note: For 10BT, rate settings above 10Mbps are
set to the default value 0000 (Not limited).
When TX multiple queue select enable is off
(only 1 queue per port), rate limiting applies only
to priority 0 queue.
February 2010
76
M9999-021110-1.6