KSZ8841_11 Datasheet, PDF (76/105 Pages) Micrel Semiconductor – Single-Port Ethernet MAC Controller with Non-PCI Interface

Micrel, Inc.
KSZ8841-16/32 MQL/MVL/MBL
Bank 45 PHY 1 MII-Register Basic Control Register (0x00): P1MBCR
This register contains Media Independent Interface (MII) register for port 1 as defined in the IEEE 802.3 specification.
Bit
Default
R/W Description
Bit is same as:
15
0
RO Soft reset
Not supported.
14
0
RW Reserved.
13
0
RW Force 100
1 = force 100Mbps if AN is disabled (bit 12)
0 = force 10Mbps if AN is disabled (bit 12)
Bank49 0x2 bit6
12
1
RW AN Enable
1 = auto-negotiation enabled.
0 = auto-negotiation disabled.
Bank49 0x2 bit7
11
0
RW Power-Down
1 = power-down.
0 = normal operation.
Bank49 0x2 bit11
10
0
RO Isolate
Not supported.
9
0
RW Restart AN
1 = restart auto-negotiation.
0 = normal operation.
Bank49 0x2 bit13
8
0
7
0
RW Force Full Duplex
1 = force full duplex
0 = force half duplex.
if AN is disabled (bit 12) or AN is enabled but
failed.
RO Collision test
Bank49 0x2 bit5
Not supported.
6
0
RO Reserved.
5
1
R/W HP_mdix
1 = HP Auto MDI-X mode.
0 = Micrel Auto MDI-X mode.
Bank49 0x4 bit15
4
0
RW Force MDI-X
1 = force MDI-X.
0 = normal operation.
Bank49 0x2 bit9
3
0
RW Disable MDI-X
1 = disable auto MDI-X.
0 = normal operation.
Bank49 0x2 bit10
2
0
RW Reserved.
Bank49 0x2 bit12
1
0
0
0
RW Disable Transmit
1 = disable transmit.
0 = normal operation.
RW Disable LED
1 = disable LED.
0 = normal operation.
Bank49 0x2 bit14
Bank49 0x2 bit15
October 2007
76
M9999-102207-1.6