MIC5022 Datasheet, PDF (7/9 Pages) Micrel Semiconductor – Half-Bridge MOSFET Driver

MIC5022
Functional Description
Refer to the MIC5022 block diagram.
Input
A signal greater than 1.4V (nominal) applied to the MIC5022
INPUT causes gate enhancement on an external MOSFET
connected to GATE H turning the high-side MOSFET on.
At the same time internal logic removes gate enhancement
from an external MOSFET connected to GATE L, turning the
low-side MOSFET off.
An internal pull-down resistor insures that an open INPUT
remains low, keeping the external high-side MOSFET turned
off and the low-side MOSFET turned on.
Enable (Active Low)
A signal greater than 1.4V (nominal) applied to the MIC5022
ENABLE keeps both GATE outputs off. An internal pull-down
resistor insures that the MIC5022 is enabled if the pin is open.
Gate Outputs
Rapid rise and fall times on the GATE output are possible
because each input state change triggers a one-shot which
activates a high-value current sink (10I₂) for a short time. This
draws a high current though a current mirror circuit causing
the output transistors to quickly charge or discharge the
external FET’s gate.
A second current sink continuously draws the lower value of
current used to maintain the gate voltage for the selected
state.
Internal 15V Zener diodes protect the external high-side and
low-side MOSFETs by limiting the gate to source voltage.
Charge Pump (High-Side)
An internal charge pump utilizes an external “boost” capacitor
connected between V_BOOST and the source of the external
FET (refer to Typical Application). The boost capacitor stores
charge when the FET is off. As the FET begins to turn on the
voltage on the source side of the capacitor increases (be-
Micrel
cause it is on the high side of the load) raising the V_BOOST pin
voltage. The boost capacitor charge is directed through the
gate pin to quickly charge the FET’s gate to 15V maximum
above V_DD. The internal charge pump maintains the gate
voltage by supplying a small current as needed.
Overcurrent Limiting (High or Low-Side)
Current source I₁ charges C_INT upon power up. An optional
external capacitor connected to C_T is kept discharged through
a FET Q1.
A fault condition (> 50mV from SENSE + to SENSE –) causes
the overcurrent comparator to enable current sink 2I₁ which
overcomes current source I₁ to discharge C_INT in about 5µs
time. When C_INT is discharged, the INPUT is disabled, the
FAULT output is enabled, and C_INT and C_T are ready to be
charged. Since the INPUT is disabled the GATE output turns
off.
When the GATE output turns off the FET, the overcurrent
signal is removed from the sense inputs which deactivates
current sink 2I₁. This allows C_INT and the optional capacitor
connected to C_T to recharge. A Schmitt trigger delays the
retry while the capacitor(s) recharge. Retry delay is in-
creased by connecting a capacitor connected to C_T (op-
tional).
The MIC5022’s low-side driver may be used without current
sensing by grounding both SENSE + and SENSE – pins. The
high-side driver may be used without current sensing by
connecting SENSE + and SENSE – to the source of the
external high-side MOSFET.
Fault Output
The FAULT output is an open collector transistor. FAULT is
active at approximately the same time the output is disabled
by a fault condition (5µs after an overcurrent condition is
sensed). The FAULT output is open circuit (off) during each
successive retry (5µs).
Typical Full-Bridge Application
10µF
TTL Input
(PWM signal)
MIC5022
1 _VDD
V_BOOST ¹⁴
2 _{Input Gate H} 13
3 _{Fault Sense H–} 12
4 _{CTH Sense H+} 11
5 _{Enable Gate L} 10
6 _CTL
7 _Gnd
Sense L– ⁹
Sense L+ ⁸
+12V to +20V
0.01µF
0.01µF
Load
MIC5022
14 _VBOOST
V_DD ¹
13 _{Gate H Input} 2
12 _{Sense H– Fault} 3
11 _{Sense H+ CTH} 4
10 _{Gate L Enable} 5
9 _{Sense L–}
8 _{Sense L+}
C_TL ⁶
Gnd ⁷
10µF
TTL Input
(PWM signal)
MIC5022
Figure 1. Basic Full-Bridge Circuit
184
September 1999