MIC5010 Datasheet, PDF (7/16 Pages) Micrel Semiconductor – Full-Featured High- or Low-Side MOSFET Driver

MIC5010
Micrel
Applications Information
Functional Description (Refer to Block Diagram)
A resistor R_TH from pin 4 to ground sets I4, and hence V_TRIP.
An additional capacitor C_TH from pin 4 to ground creates a
higher trip voltage at turn-on, which is necessary to prevent
The various MIC5010 functions are controlled via a logic ^{high in-rush current loads such as lamps or capacitors from}
block connected to the input pin 3. When the input is low all ^{false-tripping the current sense.}
functions are turned off for low standby current, and the gate _{When the current sense has tripped, the fault pin 14 will be}
of the power MOSFET is also held low through 500Ω to an _{high as long as the input pin 3 remains high. However, when}
N-channel switch. When the input is taken above the turn- _{the input is low the fault pin will also be low.}
on threshold (3.5V typical), the N-channel switch turns off
and the charge pump is turned on to charge the gate of the ^{Construction Hints}
power FET. A bandgap type voltage regulator is also turned High current pulse circuits demand equipment and assem-
on which biases the current sense circuitry.
bly techniques that are more stringent than normal, low
The charge pump incorporates a 100kHz oscillator and on- ^{current lab practices. The following are the sources of}
chip pump capacitors capable of charging 1 nF to 5V above ^{common pitfalls encountered while prototyping:Supplies:}
supply in 60µS typical. With the addition of 1nF capacitors ^{many bench power supplies have poor transient response.}
at C1 and C2, the turn-on time is reduced to 25µS typical. ^{Circuits that are being pulse tested, or those that operate by}
The charge pump is capable of pumping thegate up to over ^{pulse-width modulation will produce strange results when}
twice the supply voltage. For this reason a zener clamp ^{used with a supply that has poor ripple rejection, or a}
(12.5V typical) is provided between the gate pin 8 and the ^{peaked transient response. Monitor the power supply volt-}
source pin 6 to prevent exceeding the V_GS rating of the
MOSFET at high supplies.
age that appears at the drain of a high-side driver (or the
supply side of the load in a low-side driver) with an oscillo-
scope. It is not uncommon to find bench power supplies in
The current sense operates by comparing the sense volt- _{the 1kW class that overshoot or undershoot by as much as}
age at pin 5 to an offset version of the source voltage at pin _{50% when pulse loaded. Not only will the load current and}
6. Current I4 flowing in threshold pin 4 is mirrored and
returned to the source via a 1kΩ resistor to set the offset or
voltage measurements be affected, but it is possible to
over-stress various components—especially electrolytic
trip voltage. When (V_SENSE – V_SOURCE) exceeds V_TRIP , the
current sense trips and sets the current sense latch to turn
off the power FET. An integrating comparator is used to
capacitors—with possibly catastrophic results. A 10µF sup-
ply bypass capacitor at the chip is recommended.
5
reduce sensitivity to spikes on pin 5. The latch is reset to turn
the FET back on by “recycling” the input pin 3 low and then
high again.
Block Diagram
V+
13
C1 Com C2
11 10 9
Input 3
Fault ₁₄
CHARGE
PUMP
LOGIC
CURRENT
SENSE
LATCH
QR
S
MIC5010
+
-
TEMP
SENSE
V. REG
V+
I4
+
V_TRIP 1k
-
1k
7
Ground
1
4
Inhibit Threshold
500Ω
8 ^Gate
12.5V
5 ^Sense
6 ^Source
April 1998
5-93