SM802120 Datasheet, PDF (6/12 Pages) Micrel Semiconductor – ClockWorksTM 125MHz LVDS / 125 MHz HCSL Ultra-Low Jitter Frequency Synthesizer

Micrel, Inc.
SM802120
HCSL OUTPUT DC Electrical Characteristics⁽⁴⁾
V_DD = _VDDO1/2 = 3.3V 5% or 2.5V 5%, V_DD = 3.3V 5%, V_DDO1/2 = 3.3V 5% or 2.5V 5% T_A = 40°C to 85°C. R_L = 50Ω
to V_SS.
Symbol
V_OH
V_OL
V_CROSS
Parameter
Output High Voltage
Output Low Voltage
Crossing Point Voltage
Condition
Figures 1, 4
Min
Typ
Max
660
700
850
-150
0
27
250
350
550
Crystal Characteristics
Parameter
Mode of Oscillation
Frequency
Equivalent Series Resistance (ESR)
Shunt Capacitor, C0
Correlation Drive Level
Condition
10pF to 12pF Load
Min.
Typ.
Max.
Fundamental, Parallel Resonant
25
50
1
5
10
100
Units
MHz
Ω
pF
uW
AC Electrical Characteristics^{(4, 5)}
V_DD = V_DDO1/2 = 3.3V 5% or 2.5V 5%; V_DD = 3.3V 5%, V_DDO1/2 = 3.3V 5% or 2.5V 5%; T_A = 40°C to 85°C.
Symbol
F_OUT
T_R/T_F
T_R/T_F
ODC
T_LOCK
T_jit()
Parameter
Output Frequency
LVDS Output Rise/Fall Time
HCSL Output Rise/Fall Time
Output Duty Cycle
PLL Lock Time
RMS Phase Jitter⁽⁶⁾
(Output = 125MHz LVDS)
RMS Phase Jitter⁽⁶⁾
(Output = 125MHz HCSL)
Spurious Noise Components
Condition
20% – 80%, Figures 2, 5
20% – 80%, Figures 2, 4
HCSL, LVDS outputs
Integration Range:(12KHz – 20MHz)
Integration Range:(1.875MHz – 20MHz)
Integration Range:(12KHz – 20MHz)
Integration Range:(1.875MHz – 20MHz)
25MHz (LVDS outputs)
25MHz (HCSL outputs)
Min Typ Max Units
125
MHz
100 160 400
ps
150 300 450
ps
48
50
52
%
20
ms
250
fs
100
fs
250
fs
100
fs
-80
-85
dBc
1. Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is not implied
at conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.
2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings.
3. Package thermal resistance assumes exposed pad is soldered (or equivalent) to the devices most negative potential on the PCB.
4. The circuit is designed to meet the AC and DC specifications shown in the above table after thermal equilibrium has been established.
5. All phase noise measurements were taken with an Agilent 5052B phase noise system
6. Measured using 25MHz crystal as the input reference source. If using an external reference input, use a low phase noise source. With an external
reference, the phase noise will follow the input source phase noise up to about 1MHz.
September 2011
6
M9999-092911-A
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