SM802120 Datasheet, PDF (3/12 Pages) Micrel Semiconductor – ClockWorksTM 125MHz LVDS / 125 MHz HCSL Ultra-Low Jitter Frequency Synthesizer

Micrel, Inc.
Pin Description
Pin Number
25, 26
28, 29
32, 33
35, 36
41, 42
1, 2
Pin Name
/Q1, Q1
/Q2, Q2
/Q3, Q3
/Q4, Q4
/Q5, Q5
/Q6, Q6
4, 5
/Q7, Q7
7, 8
/Q8, Q8
31, 37, 38
43, 44, 16
24, 39
VDDO1
VDDO2
VSSO1
Pin Type
O, (DIF)
O, (DIF)
O, (DIF)
PWR
PWR
PWR
3, 6, 40
VSSO2
10, 11, 14, 17, 20,
27, 30, 34
12, 13
9, 21, 23
TEST
VDD
VSS
(Exposed Pad)
18
XTAL_IN
PWR
PWR
PWR
I, (SE)
19
XTAL_OUT
O, (SE)
15
OE1
I, (SE)
22
OE2
I, (SE)
SM802120
Pin Level
Pin Function
LVDS
Differential Clock Outputs from Bank 1
125MHz
LVDS
HCSL
Differential Clock Outputs from Bank 2
125MHz
Differential Clock Outputs from Bank 2
125MHz
Crystal
Crystal
LVCMOS
LVCMOS
Power Supply for the Outputs on Bank 1
Power Supply for the Outputs on Bank 2
Power Supply Ground for the Outputs on Bank
1
Power Supply Ground for the Outputs on Bank
2
Factory Test Pins. Do not connect anything to
these pins.
Core Power Supply
Core Power Supply Ground. The exposed pad
must be connected to the VSS ground plane.
Crystal Reference Input, no load caps needed.
See Fig. 7.
Crystal Reference Output, no load caps
needed.
See Fig. 7.
Output Enable, Q1-Q4 disables to tri-state,
0 = Disabled, 1 = Enabled, 45KΩ pull-up
Output Enable, Q5-Q8 disables to tri-state,
0 = Disabled, 1 = Enabled, 45KΩ pull-up
Truth Table
OE1/2
0
1
OUTPUTS
Tri-state
HCSL / LVDS
September 2011
3
M9999-092911-A
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