SM802112 Datasheet, PDF (6/12 Pages) Micrel Semiconductor – ClockWorks™ 3-Output, 480MHz/80MHz, Ultra-Low Jitter LVDS/CMOS Frequency Synthesizer

Micrel, Inc.
SM802112
AC Electrical Characteristics^{(4, 5)}
V_DD = V_DDO1/2 = 3.3V ±5% or 2.5V ±5%
V_DD = 3.3V ±5%, V_DDO1/2 = 3.3V ±5% or 2.5V ±5%
T_A = −40°C to +85°C.
Symbol
Parameter
Condition
F_OUT
Output Frequency
Q0 Output
Q1, Q2 Outputs
F_REF
Reference Input Frequency
T_R/T_F
LVDS Output Rise/Fall Time
LCMOS Output Rise/Fall Time
20% – 80%
20% – 80%
ODC
Output Duty Cycle
LVDS Outputs
LVCMOS Output
T_SKEW
T_LOCK
Output-to-Output Skew
PLL Lock Time
Q1 to Q2, Note 6
T_jit(∅)
RMS Phase Jitter⁽⁷⁾
480MHz LVDS
Integration Range (1kHz – 100MHz)
80MHz LVDS, LVCMOS
Integration Range (1kHz – 20MHz)
Min.
100
100
48
45
Typ.
480
80
80
250
250
50
50
60
Max.
400
500
52
55
150
20
Units
MHz
MHz
ps
%
ps
ms
300
600
fs
290
600
Phase
Noise
Input Phase Noise
80MHz Input Frequency
Offset Frequency:
1kHz
10kHz
100kHz
1MHz
−124
dBc
−135
−143
−145
Phase
Noise
Output Phase Noise
480MHz Output Frequency
Offset Frequency:
1kHz
10kHz
100kHz
1MHz
10MHz
20MHz
100MHz
−105
−115
−120
dBc
−120
−150
−154
−160
Spurious Noise Components
80MHz for Q0 480MHz
−58
-48
dBc
Notes:
5. All phase noise measurements were taken with an Agilent 5052B phase noise system.
6. Defined as skew between outputs at the same supply voltage and temperature. Measured as the difference of the output differential crossing point
of Q1 and /Q1 80MHz LVDS, and the 50% point of LVCMOS Q2. LVCMOS Q2 and /Q2 are both ac coupled into 50 ohms.
7. REF_IN driven with a low-noise source, ClockWorks SM802001 programmed for an 80MHz CMOS output. If using an external reference input, use
a low phase noise source. With an external reference, the phase noise will follow the input source phase noise up to about 1MHz. Measured with
input noise of 1kHz -126dBc, 10kHz -136dBc, 100kHz -143dBc, 1MHz -146dBc.
September 2011
6
M9999-091411-A
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