KSZ8873MLL_11 Datasheet, PDF (56/108 Pages) Micrel Semiconductor – Integrated 3-Port 10/100 Managed Switch with PHYs

Micrel, Inc.
KSZ8873MLL/FLL/RLL
Register 14 (0x0E): Global Control 12
Bit
Name
R/W Description
7
Unknown R/W Send packets with unknown destination MAC addresses to specified
Packet
port(s) in bits [2:0] of this register.
Default
Port
Enable
=0, Disable
=1, Enable
6
Drive
R/W =1, 16mA
Strength
of I/O Pad
=0, 8mA
5
Reserved R/W Reserved
Do not change the default values.
4
Reserved RO Reserved
3
Reserved R/W Reserved
Do not change the default values.
2-0
Unknown R/W Specify which port(s) to send packets with unknown destination MAC
Packet
addresses. This feature is enabled by bit [7] of this register.
Default
Port
Bit 2 stands for port 3.
Bit 1 stands for port 2.
Bit 0 stands for port 1.
An ‘1’ includes a port.
An ‘0’ excludes a port.
Register 15 (0x0F): Global Control 13
Bit
Name
R/W Description
7-3
PHY
R/W 00000 : N/A
Address
00001 : Port 1 PHY address is 0x1
00010 : Port 1 PHY address is 0x2
…
11101 : Port 1 PHY address is 0x29
11110 : N/A
11111 : N/A
Note:
Port 2 PHY address = (Port 1 PHY address) + 1
2-0
Reserved RO Reserved
Do not change the default values.
Default
0
1
0
0
0
111
Default
00001
000
September 2011
56
M9999-092111-1.5