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MIC5891_06 Datasheet, PDF (5/7 Pages) Micrel Semiconductor – 8-Bit Serial-Input Latched Source Driver
MIC5891
Micrel, Inc.
Truth Table
Serial
Data
Input
H
L
X
Clock
Input
Shift Register Contents
I1 I2 I3
H R1 R2
L R1 R2
R1 R2 R3
XXX
P1 P2 P3
… IN-1 IN
… RN-2 RN-1
… RN-2 RN-1
… RN-1 RN
… XX
… PN-1 PN
Serial
Data Strobe
Output Input
RN-1
RN-1
RN
X
L
PN
H
Latch Contents
I1 I2 I3 … IN-1 In
Output
Enable
R1 R2 R3 … RN-1 RN
P1 P2 P3 … PN-1 PN
L
X X X…X X
H
L = Low Logic Level
H = High Logic Level
X = Irrelevant
P = Present State
R = Previous State
Output Content
I1 I2 I3 … IN-1 In
P1 P2 P3 … PN-1 PN
L L L… L L
Applications Information
Serial data present at the input is transferred into the shift
register on the rising edge of the CLOCK input pulse. Additional
CLOCK pulses shift data information towards the SERIAL
DATA OUTPUT. The serial data must appear at the input prior
to the rising edge of the CLOCK input waveform.
The 8 bits present in the shift register are transferred to the
respective latches when the STROBE is high (serial-to-parallel
conversion). The latches will continue to accept new data as
long as the STROBE is held high. Most applications where the
latching feature is not used (STROBE tied high) require the
OUTPUT ENABLE input to be high during serial data entry.
Outputs are active (controlled by the latch state) when the
OUTPUT ENABLE is low. All Outputs are low (disabled) when
the OUTPUT ENABLE is high. OUTPUT ENABLE does not
affect the data in the shift register or latch.
May 2006
5
MIC5891