MIC502_11 Datasheet, PDF (5/15 Pages) Micrel Semiconductor – Fan Management IC

Micrel, Inc.
MIC502
V_{O T}
0.7V_DD
V_{T 1}
V_{T 2}
V_{S LP}
0.3V_DD
V_IH
V_IL
0V
40%
60%
30%
100%
PWM
Range
20%
0%
V_{O T F}
V_{O H}
V_{O L}
0V
V_{O U T}
V_{O H}
V_{O L}
0V
H
t_{S T A R T U P}
I
t_{P W M}
J
100% 40%
60%
L
M
K
100%
N
O
30%
0%
Output
Duty Cycle
V_DD
V_DD
0V
Figure 2. MIC502 Typical Power-Up System Behavior
Note H. At power-on, the startup timer forces OUT on for 64 PWM cycles of the internal timebase (t_PWM). This insures that the fan will start from a dead
stop.
Note I. The PWM duty-cycle follows the higher of V_T1 and V_T2, in the case, V_T1.
Note J. The PWM duty-cycle follows V_T1 as it increases.
Note K. PWM duty-cycle is 100% (OUT constantly on) anytime V_T1 > V_PWM(max).
Note L. /OTF is asserted anytime V_T1 > V_OT. (The fan continues to run at 100% duty-cycle).
Note M. /OTF is deasserted when V_T1 falls below V_OT; duty-cycle once again follows V_T1.
Note N. Duty-cycle follows V_T1 until V_T1 < V_T2, at which time V_T2 becomes the controlling input signal. Note that V_T1 is below V_SLP but above V_IH; so
normal operation continues. (Both V_T1 and V_T2 must be below V_SLP to active sleep mode).
Note O. All functions cease when V_T1 < V_IL; this occurs regardless of the state of V_T2.
November 2006
5
M9999-112206