MIC2587 Datasheet, PDF (3/16 Pages) Micrel Semiconductor – Single-Channel, Positive High-Voltage Hot Swap Controller

Micrel
MIC2587/MIC2587R
Pin Description
Pin Number
Pin Name
1
ON
2
FB
PWRGD
(MIC2587-1)
(MIC2587R-1)
Active-HIGH
3
/PWRGD
(MIC2587-2)
(MIC2587R-2)
Active-LOW
4
GND
5
TIMER
Pin Function
Enable Input: When the voltage at the ON pin is higher than the V_ONH threshold, a start cycle
is initiated. An internal current source (I_GATEON) is activated which charges the GATE pin,
ramping up the voltage at this pin to turn on an external MOSFET. Whenever the voltage at
the ON pin is lower than the V_ONL threshold, an undervoltage lockout condition is detected
and the I_GATEON current source is disabled while the GATE pin is pulled low by another
internal current source (I_GATEOFF). After a load current fault, toggling the ON pin LOW will
reset the circuit breaker then back HIGH (ON pin) will initiate another start cycle.
Output Voltage Feedback Input: This pin is connected to an external resistor divider that is
used to sample the output load voltage. The voltage at this pin is measured against an
internal comparator whose output controls the PWRGD (or /PWRGD) signal. PWRGD (or
/PWRGD) asserts when the FB pin voltage crosses the V_FBH threshold. When the FB pin
voltage is lower than its V_FBL threshold, PWRGD (or /PWRGD) is de-asserted. The FB
comparator exhibits a typical hysteresis of 80mV.
The FB pin voltage also affects the MIC2587/MIC2587R’s foldback current limit operation
(see the “Functional Description” section for further information).
Power-is-Good (PWRGD or /PWRGD), Open-drain Output: This pin remains de-asserted
during start up while the FB pin voltage is below the V_FBH threshold. Once the voltage at the
FB pin rises above the V_FBH threshold, the Power-is-Good output asserts with minimal delay
(typically ≤ 5µs).
For the (-1) options, the PWRGD output pin will be high-impedance when the FB pin voltage
is higher than V_FBH and will pull down to GND when the FB pin voltage is less than V_FBL.
For the (-2) options, the /PWRGD output pin will be high-impedance when the FB pin
voltage is lower than V_FBL and will pull down to GND when the FB pin voltage is higher than
V_FBH.
The Power-is-Good output pin is connected to an open-drain, N-channel transistor
implemented with high-voltage structures. These transistors are capable of operating with
pull-up resistors to supply voltages as high as 100V.
To use this signal as a logic control in low-voltage dc-dc conversion applications, an external
pull-up resistor between this pin and the logic supply voltage is recommended, unless an
internal pull-up impedance is provided by the dc-dc module or other device (load).
Tie this pin directly to the system’s analog GND plane
Current Limit Response Timer: A capacitor connected from this pin to GND provides
overcurrent filtering to prevent nuisance “tripping” of the circuit breaker by setting the time
(t_FLT) for which the controller is allowed to remain in current limit. Once the MIC2587 circuit
breaker trips, the output latches off. Under normal (steady state) operation, the TIMER pin
is held to GND by an internal 3.5µA current source (I_TIMERDN). When the voltage across the
external sense resistor exceeds the V_TRIP threshold, an internal 65µA current source
(I_TIMERUP) is activated to charge the capacitor connected to the TIMER pin. When the TIMER
pin voltage reaches the V_TIMERH threshold, the circuit breaker is tripped pulling the GATE pin
low, the I_TIMERUP current source is disabled, and the TIMER pin capacitor is discharged by
the I_TIMERDN current source. When the voltage at the TIMER pin is less than 0.5V, the
MIC2587 can be restarted by toggling the ON pin LOW then HIGH.
For the MIC2587R, the capacitor connected to the TIMER pin sets the period of auto-retry
where the duty cycle is fixed at a nominal 5%.
October 2004
3
M9999-102204
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