MIC2587 Datasheet, PDF (11/16 Pages) Micrel Semiconductor – Single-Channel, Positive High-Voltage Hot Swap Controller

Micrel
V_TIMERH threshold, and if exceeded, trip the circuit breaker.
Capacitor C_TIMER will then be discharged by I_TIMERDN until
the voltage across C_TIMER drops below the V_TIMERL
threshold, at which time another start cycle is initiated. This
will continue until either of the following occurs: a) the fault
condition is removed, b) the input supply voltage power is
removed/recycled, or c) the ON pin is toggled LOW then
HIGH. The duty cycle of the auto-restart function is
therefore fixed at 5% and the period of the auto-restart
cycle is given by:
t _{AUTO −RESTARt} = 20 × t_{FLT_AUTO}
( ) ( ) _{tAUTO-RESTART}
= 20 ×
C_TIMER
× V_TIMERH − V_TIMERL
I_TIMERUP
t _AUTO-RESTART
=
C_TIMER
× _{⎜⎜⎝⎛}250
ms
µF
⎟⎟⎠⎞
(7)
The auto-restart period for the example above where the
worse-case C_TIMER was calculated to be 3.3µF is:
t_AUTO-RESTART = 825ms
Input Undervoltage Lockout
The MIC2587/MIC2587R have an internal undervoltage
lockout circuit that inhibits operation of the controller’s
internal circuitry unless the power supply voltage is stable
and within an acceptable tolerance. If the supply voltage to
the controller, with respect to ground is greater than the
V_UVH threshold voltage (8V typical), then the controller’s
internal circuits are enabled and the controller is then ready
for normal operation pending the state of the ON pin
voltage. Once in steady-state operation, the controller’s
internal circuits remain active so long as the supply voltage
with respect to ground is higher than the controller’s
internal V_UVL threshold voltage (7.5V typical).
MIC2587/MIC2587R
Power-is-Good Output Signals
For the MIC2587-1 and MIC2587R-1, the power-good
output signal (PWRGD) will be high impedance when the
FB pin voltage is higher than the V_FBH threshold and will
pull down to GND when the FB pin voltage is lower than
the V_FBL threshold. For the MIC2587-2 and MIC2587R-2,
the power-good output signal (/PWRGD) will pull down to
GND when the FB pin voltage is higher than the V_FBH
threshold and will be high impedance when the FB pin
voltage is lower than the V_FBL threshold. Hence, the (-1)
parts have an active-HIGH PWRGD signal and the (-2)
parts have an active-LOW /PWRGD output. PWRGD (or
/PWRGD) may be used as an enable signal for one or
more following DC/DC converter modules or for other
system uses as desired. When used as an enable signal,
the time necessary for the PWRGD (or /PWRGD) signal to
pull-up (when in high impedance state) will depend upon
the (RC) load at the Power-is-Good pin.
The Power-is-Good output pin is connected to an open-
drain, N-channel transistor implemented with high-voltage
structures. These transistors are capable of operating with
pull-up resistors to supply voltages as high as 100V.
October 2004
11
M9999-102204
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