MIC2111B Datasheet, PDF (29/35 Pages) Micrel Semiconductor – High-Performance, Multi-Mode, Step-Down Controller

Micrel, Inc.
Design and Layout Checklist
• Ceramic capacitor placed between the VIN and PGND
close to power module input.
• Output ceramic capacitors should be placed next to
inductor output node for high-frequency decoupling.
• The signal and power ground planes must be
separated to prevent high current and fast switching
signals from interfering with the low level, noise
sensitive analog signals. These planes should be
connected at only 1 point.
• The following signals and their components should be
decoupled or referenced to the power ground plane:
− VIN, VCC, PGND
• These analog signals should be referenced or
decoupled to the analog ground plane:
− VCC, SS, PG, COMP, FB, VOUT, and AGND
• Place the current-sense lines in differential way. The
trace coming from the switch node to this resistor has
high dv/dt and should be routed away from other noise
sensitive components and traces.
• The remote sense traces must be routed close
together or on adjacent layers to minimize noise
pickup. The traces should be routed away from the
switch node, inductors, and other high dv/dt or di/dt
sources.
MIC2111B
October 13, 2015
29
Revision 2.1