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MIC2111B Datasheet, PDF (20/35 Pages) Micrel Semiconductor – High-Performance, Multi-Mode, Step-Down Controller
Micrel, Inc.
Light Load Operation (DCM)
The MIC2111B supports pulse-skip mode for good light
efficiency. Connecting the MODE or SMOD# pin of the
power module to GND is required to enable the light-load
mode. To avoid discharging the output during light-load
mode, the power module zero current detector disables
the low-side FET once inductor current reaches zero. The
MIC2111B generates the next PWM signal based on
COMP voltage. This will cause discontinuous conduction
mode at the switch node as shown below.
MIC2111B
Figure 6. Light Load Operation (DCM)
Outside Audio Operation
Some systems require outside audio operation during
light-load mode. When the system load reduces during
light-load mode, the system will change from CCM to
DCM and, as the load reduces further, the switching
frequency reduces as well. If the effective switching
frequency reduces below a certain threshold, the
MIC2111B will enter outside audio mode, attempting to
maintain the effective switching frequency above the
audio band. For the outside audio mode to function, the
LS output of the MIC2111B must be connected to the
MODE pin of the DrMOS. While in this mode, if the
MIC2111B detects that the period between HS pulses is
longer than 32µs it forces LS a logic-1, which turns on the
low-side driver. This results in current flowing from the
output capacitor through the inductor and low-side
MOSFET. This can cause the output voltage to fall and
initiate a PWM cycle with HS going high and LS going
low.
Figure 7. Outside Audio Waveform
Output Overvoltage Protection (OVP)
The MIC2111B has a dedicated pin for overvoltage
protection (OVP). The OVP pin senses the output voltage
through a voltage divider. If this voltage is higher than the
reference voltage, the overvoltage protection engages
and FAULTb is pulled low.
This OVP function typically protects against open
feedback loop or VFB short-to-GND. This will protect the
costly load from being damaged by the DC/DC converter.
The OVP level can be programmed through a resistive
divider at the OVP pin as follows. Select R4 same as
lower feedback resistor. R1 can be calculated based
upon required OVP level as illustrated in Equation 1 and
Figure 8.
R1
=
R4
×


VOUT − 0.6V
0.6V


Eq. 1
Figure 8. OVP Programming
After the OVP fault is triggered, the system will be shut
down and latched off. It is required to cycle either VCC or
EN for enabling the converter.
October 13, 2015
20
Revision 2.1