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MIC2342 Datasheet, PDF (27/32 Pages) Micrel Semiconductor – Dual-Slot PCI Express® Hot-Plug Controller
Micrel, Inc.
Slot[A/B] Fault Reporting
The MIC2342’s /FAULT_MAIN[A/B] open-drain digital
output are activated after power-on-reset and become
asserted when:
The ON[A/B] input signals are asserted, AND
• The 12VIN[A/B] or the 3VIN[A/B] input
voltages is less than its respective ULVO
threshold, OR
• The fast OC circuit breaker[A/B] has tripped,
OR
• The slow OC circuit breaker[A/B] has tripped
AND its corresponding CFILTER[A/B] timeout or
the digital filter delay has expired.
In order to clear the /FAULT_MAIN[A/B] outputs once
asserted and to reset the corresponding circuit
breaker(s), a high-to-low transition is required on the
ON[A/B] input signals. Please see /FAULT_MAIN[A/B]
pin descriptions for additional information.
MIC2342/2342R
The MIC2342’s /FAULT_AUX[A/B] open-drain digital
outputs are activated after power-on-reset and become
asserted when:
The AUXEN[A/B] input signals are asserted, AND
• The slow VAUX[A/B] OC circuit breaker has
tripped AND its corresponding CFILTER[A/B]
timeout or the digital filter delay has expired,
OR
• The slow VAUX[A/B] OC circuit breaker has
tripped AND the Slot[A/B] die temperature is
higher than 140°C, OR
• The MIC2342’s global die temperature is
higher than 160°C
In order to clear the /FAULT_AUX[A/B] outputs once
asserted and to reset the VAUX[A/B] circuit breaker(s), a
high-to-low transition is required on the AUXEN[A/B]
input signals. Please see /FAULT_AUX[A/B] pin
descriptions for additional information.
If the /FORCE_ON[A/B] digital inputs are used for
diagnostic purposes, the /FAULT_MAIN[A/B],
/FAULT_AUX[A/B],
/PWRGD[A/B],
and
/DLY_PWRGD[A/B] digital outputs are de-asserted once
/FORCE_ON[A/B] inputs are asserted.
Figure 10. State Diagram for /FAULT_MAIN[A/B] Signals
Figure 11. State Diagram for /FAULT_AUX[A/B] Signals
June 2008
27
M9999-062008-B