MIC2591B Datasheet, PDF (26/34 Pages) Micrel Semiconductor – Dual-Slot PCI Express Hot-Plug Controller

MIC2591B
Control Register, Slot B (CNTRLB)
8-Bits, Read/Write
Control Register, Slot B (CNTRLB)
D[7]
D[6]
D[5]
D[4]
D[3]
read-only
read-only
read only
read only
read-only
AUXBPG
MAINBPG Reserved
Reserved
Reserved
D[2]
read/write
/FORCE_B
ENABLE
D[1]
read/write
MAINB
Micrel
D[0]
read/write
VAUXB
Bit(s)
Function
AUXBPG AUX output power-good status, Slot B
MAINBPG MAIN output power-good status, Slot B
D[5]
D[4]
D[3]
/FORCE_B
ENABLE
MAINB
VAUXB
Reserved
Reserved
Reserved
Allows or inhibits the operation of the /FORCE_ONB
input pin
MAIN enable control, Slot B
VAUX enable control, Slot B
Operation
1 = Power-is-Good
(VAUXB Output is above its UVLO threshold)
1 = Power-is-Good
(MAINB Outputs are above their UVLO
thresholds)
Always read as zero
Always read as zero
Always read as zero
0 = /FORCE_ONB is enabled
1 = /FORCE_ONB is disabled
0 = Off, 1 = On
0 = Off, 1 = On
Power-Up Default Value:
Command_Byte Value (R/W):
0000 0000_b = 00_h
0000 0011_b = 03_h
The power-up default value is 00_h. Slot is disabled upon power-up, i.e., all supply outputs are off.
Notes:
1. The state of the /PWRGDB pin is the logical AND of the values of the AUXBPG and the MAINBPG bits, except when /FORCE_ONB is asserted. If
/FORCE_ONB is asserted (the pin is pulled low), and /FORCE_BENABLE is set to a logic zero, the /PWRGDB pin will be unconditionally forced to
its open-drain (“Power Not Good”) state.
2. The values of the MAINBPG and AUXBPG register bits are not affected by /FORCE_ONB, but will instead continue to read as high if power is
“Good,” and as low if the conditions which indicate that power is good are not met.
March 2005
26
M9999-033105