MIC2591B Datasheet, PDF (18/34 Pages) Micrel Semiconductor – Dual-Slot PCI Express Hot-Plug Controller

MIC2591B
are enabled by asserting ON[A/B], the 3VGATE[A/B] and
12VGATE[A/B] pins are each connected to a constant cur-
rent supply. These supplies are each nominally 25µA. For a
slot’s 3VGATE pin, this is a current source; for the 12VGATE
pin, this is a current sink.
Inrush Current and Load Dominated Start-up
The expected maximum inrush current can be calculated by
using the following equation:
INRUSH��
I_GATE
 ^CLOAD  25A�� ^CLOAD
C_GATE
C_GATE
where I_GATE is the GATE pin current, I_{GATE(3VCHARGE)}
or I_{GATE(12VSINK)}, C_LOAD is the load capacitance, and
C_GATE is the total GATE capacitance (C_ISS of the external
MOSFET and any external capacitance connected from
the GATE output pin to the GATE reference – GND or
source).
For the 3.3V outputs and 12V outputs (if no external 12VGATE
output capacitors are implemented), the following equation
is used to determine the output slew rate.
dV_OUT�dt��
I_{LIM(3V�12V)}
C_{LOAD(3V�12V)}
Consequently, the overcurrent timer delay must be pro-
grammed to exceed the time it will take to charge the output
load to the input rail voltage level.
MAIN Outputs (Start-up Delay and Slew-Rate Control)
The 3.3V outputs act as source followers. In this mode of
operation,V_SOURCE = [V_GATE – V_TH(ON)] until the associated
output reaches 3.3V. The voltage on the gate of the MOSFET
will then continue to rise until it reaches 12V, which ensures
minimum R_DS(ON). Note that a delay exists between the ON
command to a slot and the appearance of voltage at the slot’s
3.3V output. This delay is the time required to charge the
3VGATE output up to the threshold voltage of the external
MOSFET (typically about 3V).
  ^CGATE ^{� V}GS(TH)
t_3VDLY �
I_{GATE(3VCHARGE)}
The source (output) side of the external MOSFET will reach
the drain voltage in a time given by:
  ^CLOAD ^{ V}DRAIN
t_{3V(SOURCE_DRAIN)} = t_3VDLY +
I_LIM(3V)
For the 12V outputs, each MOSFET is configured as a Miller
integrator (by virtue of C_MILLER, which is connected between
the MOSFET’s gate and drain). In this configuration, the
feedback action from drain to gate of the MOSFET causes
the voltage at the drain of the MOSFET to slew in a linear
fashion at a rate which satisfies the following equation:
dv/dt(12V)
�



I_GATE
C_MILLER


A delay exists between the ON command to a slot and the
appearance of voltage at the slot’s 12V output. For a slot’s
12V output, that delay is given by the time required for the
capacitor from the gate of the MOSFET to its source (typically
five times the value of C_MILLER) to charge to the threshold
Micrel
voltage of the MOSFET (typically about 3V). In this instance,
the delay before the output voltage starts ramping can be
approximated by:
  ^CGATE(TOTAL) ^{× V}GS(TH)
t_12VDLY 
I_GATE
where C_GATE(TOTAL) is the sum of the C_GS of the external
MOSFET, any external capacitance from the GATE output of
the MIC2591B to the source of the MOSFET, and C_MILLER
(external, if used).
Table 1 approximates the output slew-rate for various values
of C_GATE when start-up is dominated by GATE capacitance
(external C_GATE from GATE pin to ground plus C_GS of the ex-
ternal MOSFET for the 3.3V rail; C_MILLER for the 12V rail).
| I_GATE | _{= 25µA}
C_GATE or C_MILLER
dv/dt (load)
0.01µF*
2.5V/ms
0.022µF*
1.136V/ms
0.047µF
0.532 V/ms
0.1µF
0.250V/ms
* Values in this range will be affected by the internal parasitic capaci-
tances of the MOSFETs used, and should be verified experimentally.
Table 1. 3.3V and 12V Output Slew-Rate Selection for
Gate Capacitance Dominated Start-up
Power-Down Cycle
When one or more PCI slots are disabled via the MIC2591B
output control pins, ON[A/B] or AUXEN[A/B], the output volt-
age for each supply will discharge as a function of the RC
time constant produced by the controller’s internal resistance
(R_DIS) connected to the output and the load capacitance
(C_LOAD). The typical value of R_DIS for each supply is listed
in the Electrical Characteristics Table. The charts below in
Figure 7 display curves of the fall time (90% - 10%) as a
function of the output load capacitance for both the 3V and
12V MAIN outputs.
3V Output Discharge as a
Function of Load Capacitance
1200
12V Output Discharge as a
Function of Load Capacitance
1200
1000
1000
800
800
600
600
400
400
200
200
00 _{50 100 150 200 250}
FALL TIME (ms)
00 _{500 1000 1500 2000 2500}
FALL TIME (ms)
Figure 7. 3V and 12V Output Discharge vs. Load
Capacitance
Standby Mode
Standby mode is entered when one or more of the MAIN
supply inputs (12VIN and/or 3VIN) is below its respective
UVLO threshold or OFF. The MIC2591B also supplies
3.3V auxiliary outputs (VAUX[A/B]), satisfying PCI Express
March 2005
18
M9999-033105