MIC24046 Datasheet, PDF (21/27 Pages) Micrel Semiconductor – Pin-Programmable, 4.5V − 19V, 5A Step-Down Converter

Micrel, Inc.
The MIC24046 uses a transconductance (Gm_EA =
1.5mA/V) error amplifier. Frequency compensation is
implemented with a Type-II network (R_C1, C_C1, and C_C2)
connected from COMP to AGND. The compensator
transfer function consists of an integrator for zero DC
(voltage regulation error), a zero to boost the phase
margin of the overall loop gain around the crossover
frequency, and an additional pole that can be used to
cancel the output capacitor ESR zero, or to further
attenuate switching frequency ripple. In both cases, the
additional pole makes the regulation loop less susceptible
to switching frequency noise. The additional pole is
created by capacitor C_C2. Equation 17 details the
compensator transfer function H_C(S) (from OUTSNS to
COMP).
H _C(S)
=
− ^R1
R1+ R2
× Gm_EA
×
S
×
1
(C_C1
+
C_C2
)
× ^{(1+ S × RC1 × CC1)}
^{1 +}
S
× R_C1
×
C_C1
C_C1
×
+
C_C2
C_C2

Eq. 17
The overall voltage loop gain T_V(S) is the product of the
control-to-output and the compensator transfer functions:
T_V(S) = G_CO(S) × H_C(S)
Eq. 18
The value of the attenuation ratio R1/(R1 + R2) depends
on the output voltage selection, and can be retrieved as
illustrated in Table 5:
Table 5. Internal Feedback Divider Attenuation Values
VO Range
R1/(R1 + R2)
A
(A = 1 + R2/R1)
0.7V − 1.2V
1
1
1.5V − 1.8V
0.5
2
2.5V(2.49V) − 3.3V
0.333
3
The compensation design process is as follows:
1. Set the T_V(S) loop gain crossover frequency f_XO in the
range f_S/20 to f_S/10. Lower values of f_XO allow a more
predictable and robust phase margin. Higher values
of f_XO would involve additional considerations about
the current loop bandwidth in order to achieve a
robust phase margin. Taking a more conservative
approach is highly recommended.
f_XO
≈
f_S
20
Eq. 19
MIC24046
2. Select R_C1 to achieve the target crossover frequency
f_XO of the overall voltage loop. This typically happens
where the power stage transfer function G_CO(S) is
rolling off at -20dB/dec. The compensator transfer
function H_C(S) is in the so-called mid-band gain region
where C_C1 can be considered a DC-blocking short
circuit while C_C2 can still be considered as an open
circuit, as calculated in Equation 20:
R _C1
=


R1+ R2
R1


⋅
2π × C_O × f_XO
Gm_EA ⋅ Gm_PS
Eq. 20
3. Select capacitor C_C1 to place the compensator zero
at the load pole. The load pole moves around with
load variations, so to calculate the load pole use as a
load resistance R_L the value determined by the
nominal output current I_O of the application, as shown
in Equation 21 and Equation 22:
R_L
=
V_O
I_O
Eq. 21
C_C1
=
C_O
×
(ESR
R_C1
+
R_L
)
Eq. 22
4. Select capacitor C_C2 to place the compensator pole at
the point where the frequency of the output capacitor
ESR is zero, or at ≥ 5 f_XO, whichever is lower.
The C_C2 is intended for placing the compensator pole at
the frequency of the output capacitor ESR zero, and/or
achieve additional switching ripple/noise attenuation.
If the output capacitor is a polarized one, its ESR zero will
typically occur at low enough frequencies to cause the
loop gain to flatten out and not roll-off at a -20dB/decade
slope around or just after the crossover frequency f_XO.
This causes undesirable scarce compensation design
robustness and switching noise susceptibility. The
compensator pole is then used to cancel the output
capacitor ESR zero, and achieve a well-behaved roll-off
of the loop gain above the crossover frequency.
If the output capacitors are only ceramic, then the ESR
zeroes frequencies could be very high. In many cases,
the frequencies could even be above the switching
frequency itself. Loop gain roll-off at −20dB/decade well
beyond the crossover frequency is ensured, but even in
this case, it is good practice to still make use of the
compensator pole to further attenuate switching noise,
while conserving phase margin at the crossover
October 14, 2015
21
Revision 1.1