MIC24046 Datasheet, PDF (15/27 Pages) Micrel Semiconductor – Pin-Programmable, 4.5V − 19V, 5A Step-Down Converter

Micrel, Inc.
Figure 2. Low-Side Cycle-by-Cycle Current-Limit Action
The low-side current limit has three different
programmable levels (for 3A, 4A, and 5A loads), in order
to fit different application requirements. Since the low-
side current limit acts on the valley current, the DC output
current level (I_OUT) where the low-side cycle-by-cycle
current limit is engaged will be higher than the current
limit value by an amount equal to ΔIL_PP/2, where ΔIL_PP is
the peak-to-peak inductor ripple current.
The high-side current limit is approximately 1.4 − 1.5
times greater than the low-side current limit (typical
values). The high-side cycle-by-cycle current limit
immediately truncates the high-side ON time without
waiting for the OFF clocking event.
A leading edge blanking (LEB) timer (108ns, typical) is
provided on the high-side cycle-by-cycle current limit to
mask the switching noise and to prevent falsely triggering
the protection. High-side cycle-by-cycle current limit
action cannot take place before the LEB timer expires.
MIC24046
Hiccup mode protection reduces power dissipation in
permanent short-circuit conditions. On each clock cycle
where a low-side cycle-by-cycle current-limit event is
detected, a 4-bit up/down counter is incremented. On
each clock cycle, without a concurrent low-side current
limit event, the counter is decremented or left at zero.
The counter cannot wrap-around below 0000 and above
1111. High-side current limit events do not increment the
counter. Only detections from low-side current limit
events trigger the counter.
If the counter reaches 1111 (or 15 events), the high- and
low-side MOSFETs become tri-stated, and power
delivery to the output is inhibited for the duration of three
times the soft-start time. This digital integration
mechanism provides immunity to momentary overloading
of the output. After the wait time, the MIC24046 retries
entering operation and initiates a new soft-start
sequence.
Figure 3 illustrates the hiccup mode short-circuit
protection logic flow. Note that hiccup mode short-circuit
protection is active at all times, including the soft-start
ramp.
October 14, 2015
15
Revision 1.1