MIC28500 Datasheet, PDF (19/29 Pages) Micrel Semiconductor – 75V/4A Hyper Speed Control™ Synchronous DC-DC Buck Regulator

Micrel, Inc.
ΔV_IN = I_L(pk) × C_ESR
Eq. 13
The input capacitor must be rated for the input current
ripple. The RMS value of input capacitor current is
determined at the maximum output current. Assuming
the peak-to-peak inductor current ripple is low:
I_CIN(RMS) ≈ I_OUT(max) × D × (1− D)
Eq. 14
The power dissipated in the input capacitor is:
P_DISS(CIN) = I_CIN(RMS)2 × C_ESR
Eq. 15
Ripple Injection
The V_FB ripple required for proper operation of the
MIC28500 g_m amplifier and error comparator is 20mV to
100mV. However, the output voltage ripple is generally
designed as 1% to 2% of the output voltage. For a low
output voltage, such as a 1V, the output voltage ripple is
only 10mV to 20mV, and the feedback voltage ripple is
less than 20mV. If the feedback voltage ripple is so small
that the g_m amplifier and error comparator can’t sense it,
then the MIC28500 will lose control and the output
voltage is not regulated. In order to have some amount
of V_FB ripple, a ripple injection method is applied for low
output voltage ripple applications.
The applications are divided into three situations
according to the amount of the feedback voltage ripple:
1) Enough ripple at the feedback voltage due to the large
ESR of the output capacitors.
As shown in Figure 7a, the converter is stable without
any ripple injection. The feedback voltage ripple is:
ΔV_FB(pp)
=
R2
R1 + R2
× ESR_COUT
× ΔI_L(pp)
Eq. 16
where ΔI_L(pp) is the peak-to-peak value of the inductor
current ripple.
2) Inadequate ripple at the feedback voltage due to the
small ESR of the output capacitors.
The output voltage ripple is fed into the FB pin through a
feedforward capacitor C_ff in this situation, as shown in
Figure 7b. The typical C_ff value is between 1nF and
22nF.
With the feedforward capacitor, the feedback voltage
ripple is very close to the output voltage ripple:
MIC28500
ΔV_FB(pp) ≈ ESR × ΔI_L(pp)
Eq. 17
3) Virtually no ripple at the FB pin voltage due to the very
low ESR of the output capacitors.
Figure 7a. Enough Ripple at FB
Figure 7b. Inadequate Ripple at FB
Figure 7c. Invisible Ripple at FB
In this situation, the output voltage ripple is less than
20mV. Therefore, additional ripple is injected into the FB
pin from the switching node SW via a resistor R_inj and a
capacitor C_inj, as shown in Figure 7c.
June 2011
19
M9999-060311-B