MIC4103_10 Datasheet, PDF (17/18 Pages) Micrel Semiconductor – 100V Half Bridge MOSFET Drivers 3/2A Sinking/Sourcing Current

Micrel
C_VDD
HI
Vdd
Level
shift
LI
C_B
HB
HO
HS
LO
MIC4103
Vss
Vin
High-Side
Fet
HS (switch) Node
Low-Side Fet ^Cin
Figure 11. Synchronous Buck Converter Power Stage
MIC4103/4104
A typical layout of a synchronous Buck converter power
stage (Figure 11) is shown in Figure 12.
The circuit is configured as a synchronous buck power
stage. The high-side MOSFET drain connects to the input
supply voltage and the source connects to the switching
node. The low-side MOSFET drain connects to the
switching node and its source is connected to ground. The
buck converter output inductor (not shown) would connect
to the switching node. The high-side drive trace, HO, is
routed on top of its return trace, HS, to minimize loop area
and parasitic inductance. The low-side drive trace LO is
routed over the ground plane which minimizes the
impedance of that current path. The decoupling capacitors,
C_B and C_VDD are placed to minimize trace length between
the capacitors and their respective pins. This close
placement is necessary to efficiently charge capacitor C_B
when the HS node is low. All traces are 0.025” wide or
greater to reduce impedance. C_IN is used to decouple the
high current path through the MOSFETs.
Top Side
Bottom Side
Figure 12. Typical Layout of a Synchronous Buck Converter Power Stage
November 2010
17
M9999-110910-B