English
Language : 

MIC261203ZA_14 Datasheet, PDF (16/29 Pages) Micrel Semiconductor – Synchronous DC-to-DC Buck Regulator
Micrel, Inc.
Figure 1. MIC261203-ZA Control Loop Timing
Figure 2 shows the operation of the MIC261203-ZA
during a load transient. The output voltage drops
because of the sudden load increase, which makes the
VFB less than VREF. This causes the error comparator to
trigger an ON-time period. At the end of the ON-time
period, a minimum OFF-time tOFF(min) is generated to
charge CBST because the feedback voltage is still below
VREF. Then, the next ON-time period is triggered by the
low feedback voltage. Therefore, the switching frequency
changes during the load transient, but returns to the
nominal fixed frequency after the output has stabilized at
the new load current level. With the varying duty cycle
and switching frequency, the output recovery time is fast
and the output voltage deviation is small in the
MIC261203-ZA converter.
MIC261203-ZA
Unlike true current-mode control, the MIC261203-ZA
uses the output voltage ripple to trigger an ON-time
period. The output voltage ripple is proportional to the
inductor current ripple if the ESR of the output capacitor
is large enough. The MIC261203-ZA control loop has the
advantage of eliminating the need for slope compensation.
To meet the stability requirements, the MIC261203-ZA
feedback voltage ripple should be in phase with the
inductor current ripple and large enough to be sensed by
the gm amplifier and the error comparator. The
recommended feedback voltage ripple is 20mV~100mV.
If a low-ESR output capacitor is selected, then the
feedback voltage ripple may be too small to be sensed by
the gm amplifier and the error comparator. Also, the
output voltage ripple and the feedback voltage ripple are
not necessarily in phase with the inductor current ripple if
the ESR of the output capacitor is very low. In these
cases, ripple injection is required to ensure proper
operation. Please refer to the “Ripple Injection”
subsection in Application Information for more details
about the ripple injection technique.
VDD Regulator
The MIC261203-ZA provides a 5V regulated output for
input voltage VIN ranging from 5.5V to 28V. When
VIN < 5.5V, VDD should be tied to PVIN pins to bypass
the internal linear regulator
Soft-Start
Soft-start reduces the power supply input surge current at
startup by controlling the output voltage rise time. The
input surge appears while the output capacitor is charged
up. A slower output rise time will draw a lower input surge
current.
The MIC261203-ZA implements an internal digital soft-
start by making the 0.6V reference voltage VREF ramp
from 0 to 100% in about 5ms in 9.7mV steps. Therefore,
the output voltage is controlled to increase slowly by a
stair-case VFB ramp. After the soft-start cycle ends, the
related circuitry is disabled to reduce current
consumption. VDD must be powered up at the same time
or after VIN to make the soft-start function correctly.
Current Limit
The MIC261203-ZA uses the RDS(ON) of the internal low-
side power MOSFET to sense overcurrent conditions.
This method avoids adding cost, board space and power
losses taken by a discrete current sense resistor. The
low-side MOSFET is used because it displays much
lower parasitic oscillations during switching than the high-
side MOSFET.
Figure 2. MIC261203-ZA Load Transient Response
July 22, 2014
16
Revision 1.1