MIC2590B Datasheet, PDF (15/24 Pages) Micrel Semiconductor – Dual-Slot PCI Hot Plug Controller

MIC2590B
Detailed Register Descriptions below:
Conversion Result Register (RESULT), 8-Bits Read Only
D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]
read-only read-only read-only read-only read-only read-only read-only read-only
Voltage or Current Data from ADC
Bit
D[7:0]
Function
Measured data from ADC
Operation
Read Only
Power-Up Default Value: Undefined following POR
Read Command Byte: 0000 0000_b = 00_h
(ADC Control Register (ADCNTRL), 8-Bits Read/Write
D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]
read-only read-only read-only read-write read-write read-write read-write read-write
BUSY Reserved Reserved SEL PAR
Supply Select
SUP[2:0]
Bit(s)
BUSY
D[6]
D[5]
SEL
PAR
SUP[2:0]
Function
Operation
ADC Status
0 = ADC Quiescent
1 = ADC Busy
Reserved
Always Read As Zero
Reserved
Always Read As Zero
A/D Slot Select
Specifies Channel for
A/D Conversion
0 = Slot A, 1 = Slot B
Parameter Control Bit for 1 = Voltage
ADC Conversion
0 = Current
Supply Select for
ADC Conversion
000 = No Conversion
001 = 3.3V Suppy
010 = 5.0V Supply
011 = +12V Supply
100 = –12V Supply
101 = VAUX Supply
Power-Up Default Value: 0000 0000_b = 00_h
Command Byte (R/W): 0000 0001_b = 01_h
To operate the ADC the ADCNTRL register must first be
initialized by selecting a slot, specifying whether voltage or
current is to be measured and then specifying the specific
supply that is to be monitored. The software must then
wait 100ms, or poll the BUSY bit until it is zero. The
RESULT register will then contain the valid result of the
conversion.
Micrel
Control Register, Slot A (CNTRLA), 8-Bits Read/Write
D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]
read-only read-only read-only read-only read-only read-only read-write read-write
AUXAPG MAINAPG Reserved Reserved Reserved Reserved MAINA VAUXA
Bit(s)
Function
Operation
AUXAPG
MAINAPG
AUX Output Power-Good
Status, Slot A
MAIN Output Power-Good
Status, Slot A
1 = Power-Good
(VAUXA output is above
its V_UVTH threshold)
1 = Power-Good
(MAINA outputs are
above their V_UVTH
thresholds)
D[5] Reserved
Always Read As Zero
D[4] Reserved
Always Read As Zero
D[3] Reserved
Always Read As Zero
D[2] Reserved
Always Read As Zero
MAINA MAIN Enable Control,
Slot A
0 = OFF, 1 = ON
VAUXA VAUX Enable Control,
Slot A
0 = OFF, 1 = ON
Power-Up Default Value: 0000 0000_b = 00_h
Command Byte (R/W): 0000 0010_b = 02_h
The power-up default value is 00h. Slot A is disabled upon
power-up, i.e., all supply outputs are off.
Control Register, Slot B (CNTRLB), 8-Bits Read/Write
D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]
read-only read-only read-only read-only read-only read-only read-write read-write
AUXBPG MAINBPG Reserved Reserved Reserved Reserved MAINB VAUXB
Bit(s)
Function
Operation
AUXBPG
MAINBPG
AUX Output Power-Good
Status, Slot B
MAIN Output Power-Good
Status, Slot B
1 = Power-Good
(VAUXB output is above
its V_UVTH threshold)
1 = Power-Good
(MAINB outputs are
above their V_UVTH
thresholds)
D[5] Reserved
Always Read As Zero
D[4] Reserved
Always Read As Zero
D[3] Reserved
Always Read As Zero
D[2] Reserved
Always Read As Zero
MAINB MAIN Enable Control,
Slot B
0 = OFF, 1 = ON
VAUXB VAUX Enable Control,
Slot B
0 = OFF, 1 = ON
Power-Up Default Value: 0000 0000_b = 00_h
Command Byte (R/W): 0000 0011_b = 03_h
The power-up default value is 00h. Slot B is disabled upon
power-up, i.e., all supply outputs are off.
August 2002
15
MIC2590B