MIC2130 Datasheet, PDF (15/20 Pages) Micrel Semiconductor – High Voltage Synchronous Buck Control IC with Low EMI Option

Micrel, Inc.
and fall times). Whereas the low-side MOSFET can
switch slower, but must handle larger RMS currents.
When duty cycle approaches 50%, the current carrying
capability of the upper MOSFET starts to become critical
also and can sometimes require external high current
drivers to achieve the necessary switching speeds.
MOSFET loss = Static loss + Transition loss
Static loss (Ps) = I_FETRMS2 x RDS_ON
Transition loss (Pt) = I_OUT x (tr+tf) x V_DSOFF x F_SWITCH/2
tr + tf = Rise time + Fall time
Due to the worst case driver currents of the MIC2130/31,
the value of tr + tf simplifies to:
tr + tf (ns) = ∆Qg (nC)
∆Qg can be found in the MOSFET characteristic curves
V_DSOFF = Voltage across MOSFET when it is off
I_FETRMS = D ⋅ ^{( I X 2 + I X ⋅ IY + IY 2 )}
3
I_X = I_OUT – I_RIPPLE/2
I_Y = I_OUT + I_RIPPLE/2
D_on = T_ON x F_SWITCH
high-side FET on time
D_off = T_ON x F_SWITCH
low-side FET on time
D_on = D = V_O/(V_IN x eff) since it changes depending on
which MOSFET we are calculating losses for.
High-side FET T_ON = D_on/F_SWITCH
The lower MOSFET is not on for the whole time that the
upper MOSFET is off due to the fixed 80ns high side
driver delay. Therefore, there is an 80ns term subtracted
from the lower FET on time equation.
Low-side FET T_ON = (1-D_on)/F_SWITCH – 80ns
There are many MOSFET packages available which
have varying values of thermal resistance and can
therefore dissipate more power if there is sufficient
airflow or heat sink externally to remove the heat.
However, for this exercise we can assume a maximum
MIC2130/1
dissipation of 1.2W per MOSFET package. This can be
altered if the final design has higher allowable package
dissipation.
Look at lower MOSFET first:
Pdis_max = 1.2 W = Ps + Pt
For the low side FET, Pt is small because VDS_OFF is
clamped to the forward voltage drop of the Schottky
diode. Therefore:
RDS_ON(max) ~ 1.2/I_FETRMS2
Example: For 12V to 1.8V @ 10A
RDS_ON(max) < 14mΩ
It is important to remember to use the RDS_ON(max) figure
for the MOSFET at the maximum temperature to help
prevent thermal runaway (as the temperature increases,
the RDS_ON increases).
∆Qg_(max) should be limited so that the low side MOSFET
is off within the fixed 80ns delay before the high side
driver turns on.
High side MOSFET:
For the high side FET, the losses should ideally be
evenly spread between transition and static losses. Use
the C of the V_IN range to balance the losses.
Pt = Pdis_max/2 = 0.6 = I_OUT x ∆Qg x V_INMID x F_SWITCH/2
∆Qg_(max) < 0.6 x 2 / (I_OUT x V_INMID x F_SWITCH)
RDSon is calculated similarly for the high side MOSFET:
RDS_ON(max) ~ 0.6 / I_FETRMS2
Using previous example:
∆Qg_(max) < 20nC
RDS_ON(max) < 35mΩ
Note that these are maximum values based upon
thermal limits and are not targeted at the highest
efficiency. Selection of lower values is recommended to
achieve higher efficiency designs.
Limits to watch out for:
Qg_TOTAL < 1500 nC/V_IN
Total of both high side and low side MOSFET Qg value
at VGS = 5V for both channels.
Example: @ V_IN(max) = 13.2V,
Qg_TOTAL < 1500/13.2 = 114nC
∆Qg_LOW < 120nC
Maximum turn on gate charge for the low side MOSFET
to ensure proper turn off before high side MOSFET is
switched on.
April 2008
15
M9999-042108-C