MIC23450_13 Datasheet, PDF (14/22 Pages) Micrel Semiconductor – 3MHz, PWM, 2A Triple Buck Regulator with HyperLight Load® and Power Good

Micrel, Inc.
The diagram shows the signals for high side switch drive
(HSD) for T_ON control, the Inductor current and the low
side switch drive (LSD) for T_OFF control.
In HLL mode, the inductor is charged with a fixed T_ON
pulse on the high side switch (HSD). After this, the LSD
is switched on and current falls at a rate V_OUT/L. The
controller remains in HLL mode while the inductor falling
current is detected to cross approximately -50mA. When
the LSD (or T_OFF) time reaches its minimum and the
inductor falling current is no longer able to reach this -
50mA threshold, the part is in CCM mode and switching
at a virtually constant frequency.
Once in CCM mode, the T_OFF time will not vary.
Therefore, it is important to note that if L is large enough,
the HLL transition level will not be triggered.
That inductor is:
L _MAX
=
V_OUT ×135ns
2× 50mA
Eq. 3
Compensation
The MIC23450 is designed to be stable with a 0.47µH to
2.2µH inductor with a 4.7µF ceramic (X5R) output
capacitor.
Duty Cycle
The typical maximum duty cycle of the MIC23450 is
80%.
Efficiency Considerations
Efficiency is defined as the amount of useful output
power, divided by the amount of power supplied.
Efficiency
%
=

V_OUT
V_IN
× I_OUT
× I_IN

× 100
Eq. 4
Maintaining high efficiency serves two purposes. It
reduces power dissipation in the power supply, reducing
the need for heat sinks and thermal design
considerations and it reduces consumption of current for
battery-powered applications. Reduced current draw
from a battery increases the devices operating time and
is critical in hand held devices.
MIC23450
There are two types of losses in switching converters;
DC losses and switching losses. DC losses are simply
the power dissipation of I²R. Power is dissipated in the
high side switch during the on cycle. Power loss is equal
to the high side MOSFET R_DSON multiplied by the Switch
Current squared. During the off cycle, the low side N-
channel MOSFET conducts, also dissipating power.
Device operating current also reduces efficiency. The
product of the quiescent (operating) current and the
supply voltage represents another DC loss. The current
required driving the gates on and off at a constant 4MHz
frequency and the switching transitions make up the
switching losses.
100%
90%
Efficiency vs. Output Current
V_OUT = 1.8V
V_IN = 3V
80%
70%
60%
50%
V_IN = 5V ^{VIN = 3.6V}
40%
30%
20%
10%
0%
0.001
0.01
0.1
1
10
OUTPUT CURRENT (A)
Figure 3. Efficiency under Load
The figure above shows an efficiency curve. From no
load to 100mA, efficiency losses are dominated by
quiescent current losses, gate drive and transition
losses. By using the HyperLight Load mode, the
MIC23450 is able to maintain high efficiency at low
output currents.
Over 100mA, efficiency loss is dominated by MOSFET
R_DSON and inductor losses. Higher input supply voltages
will increase the Gate-to-Source voltage on the internal
MOSFETs, thereby reducing the internal R_DSON. This
improves efficiency by reducing DC losses in the device.
All but the inductor losses are inherent to the device. In
which case, inductor selection becomes increasingly
critical in efficiency calculations. As the inductors are
reduced in size, the DC resistance (DCR) can become
quite significant. The DCR losses can be calculated as
follows:
P_DCR = I_OUT2 x DCR
Eq. 5
November 5, 2013
14
110513-1.1