KSZ8842-MQL Datasheet, PDF (124/141 Pages) Micrel Semiconductor – 2-Port Ethernet Switch with Non-PCI Interface

Micrel, Inc.
Timing Specifications
Asynchronous Timing without using Address Strobe (ADSN = 0)
KSZ8842-16/32 MQL/MVL/MVLI/MBL
Addr, AEN, BExN
ADSN
Read Data
RDN, WRN
Write Data
ARDY
(Read Cycle)
ARDY
(Write Cycle)
t2
valid
t1
t7
t9
t3
t4
valid
t5
t6
valid
t8
t10
Figure 17. Asynchronous Cycle – ADSN = 0
Symbol Parameter
Min Typ Max Unit
t1
A1-A15, AEN, BExN[3:0] valid to RDN, WRN active 0
ns
t2
A1-A15, AEN, BExN[3:0] hold after RDN inactive
0
ns
(assume ADSN tied Low)
A1-A15, AEN, BExN[3:0] hold after WRN inactive
1
(assume ADSN tied Low)
t3
Read data valid to ARDY rising
0.8
ns
t4
Read data to hold RDN inactive
4
ns
t5
Write data setup to WRN inactive
4
ns
t6
Write data hold after WRN inactive
2
ns
t7
Read active to ARDY Low
8
ns
t8
Write inactive to ARDY Low
8
ns
t9
ARDY low (wait time) in read cycle (Note1)
0
40
ns
(It is 0ns to read bank select register and 40ns to
read QMU data register in turbo mode) (Note2)
ARDY low (wait time) in read cycle (Note1)
0
80
ns
(It is 0ns to read bank select register and 80ns to
read QMU data register in normal mode)
t10
ARDY low (wait time) in write cycle (Note1)
0
50
ns
(It is 0ns to write bank select register)
(It is 36ns to write QMU data register)
Note 1: When CPU finished current Read or Write operation, it can do next Read or Write operation even
the ARDY is low. During Read or Write operation if the ADRY is low, the CPU has to keep the
RDN/WRN low until the ARDY returns to high.
Note 2: In order to speed up the ARDY low time to 40 ns, user has to use the turbo software driver which is only
supported in the A6 device. Please refer to the “KSZ88xx Programmer's Guide” for detail.
Table 24. Asynchronous Cycle (ADSN = 0) Timing Parameters
October 2007
124
M9999-102207-1.9